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N79E855 Datasheet, PDF (119/180 Pages) List of Unclassifed Manufacturers – Microcontroller
N79E855/854 Data Sheet
Bit
Name Description
5
BPEN See the following table (when BKEN is set).
4
BKEN 0 = Brake is never asserted.
1 = Brake is enabled, and see the following table.
3
PWM3B 0 = PWM3 output is low, when Brake is asserted.
1 = PWM3 output is high, when Brake is asserted.
2
PWM2B 0 = PWM2 output is low, when Brake is asserted.
1 = PWM2 output is high, when Brake is asserted.
1
PWM1B 0 = PWM1 output is low, when Brake is asserted.
1 = PWM1 output is high, when Brake is asserted.
0
PWM0B 0 = PWM0 output is low, when Brake is asserted.
1 = PWM0 output is high, when Brake is asserted.
Brake Condition Table
BPEN BKCH BREAK CONDITIONS
0
0
0
1
1
0
1
1
Brake on (software brake and keeping brake)
On, when PWM is not running (PWMRUN=0), the PWM output condition is follow PWMNB setting.
Off, when PWM is running (PWMRUN=1).
Brake on, when break pin asserted, no PWM output, the bit of PWMRUN will be cleared and BKF flag
will be set. The PWM output condition is follow PWMNB setting.
No active.
PWMCON2 – PWM Control Register 2
7
6
5
4
-
-
-
-
-
-
-
-
Address: D7H
3
2
1
0
FP1
FP0
-
BKF
R/W
R/W
-
R/W
Reset value: 0000 0000B
Bit
Name Description
7:4
-
Reserved
3:2
FP[1:0] Select PWM frequency pre-scalar select bits. The clock source of pre-scalar, Fpwm is in
phase with FSYS if PWMRUN=1.
1
-
Reserved
FP[1:0]
00
01
10
11
Fpwm
FSYS (Default)
FSYS /2
FSYS /4
FSYS /16
April 23, 2014
Page 119 of 180
Revision A2.5