L138-DI-225-RI Datasheet, PDF (2/13 Pages) List of Unclassifed Manufacturers – MityDSP-L138F Processor Card

Critical Link, LLC
www.CriticalLink.com
www.MityDSP.com
MityDSP
MityDSP-L138F Processor Card
29-AUG-2013
The onboard OMAP-L138 processor provides a dual CPU core topology. The OMAP-
L138 includes an ARM926EJ-S micro-processor unit (MPU) capable of running the rich
software applications programmer interfaces (APIs) expected by modern system
designers. The ARM architecture supports several operating systems, including Linux
and Windows Embedded CE. In addition to the ARM core, the OMAP-L138 also
includes a TMS320C674x floating point digital signal processing (DSP) core. The DSP
core supports the freely provided TI DSP/BIOS real-time kernel. Users can leverage the
DSP to execute real-time compute algorithms (codecs, image/data processing,
compression techniques, filtering, etc.)
Up To 256MB
mDDR Memory
16-bit wide
8MB NOR Flash
(SPI interface)
For uBoot
bootloader
Up To 512MB
NAND Flash
8-bit wide
For root FFS
System
Clocks
EMIFA (16-bit)
JTAG/Emulator
Emulator
Header
Texas Instruments
OMAP-L138
456-MHz ARM926EJ-S ™ RISC MPU
456-MHz C674x VLIW DSP
(Many pins are multiplexed between peripherals)
MMCSD 1
EMAC RMII
UHPI
uPP
LCD
VPIF I/O
Boot
Config
1.2V
1.8V
Power
2.5V _Management
3.3V
JTAG _JTAG
Header
Xilinx
Spartan-6
FPGA
Up To XC6SLX45
CSG324 pkg.
FPGA I/O
Banks can be
1.8V, 2.5V, or
3.3V
SO-DIMM-200 (DDR2 Connector)
Figure 1 MityDSP-L138F Block Diagram
Figure 1 provides a top level block diagram of the MityDSP-L138F processor card. As
shown in the figure, the primary interface to the MityDSP-L138F is through a standard
SO-DIMM-200 card edge interface. The interface provides power, synchronous serial
connectivity, and up to 96 pins of configurable FPGA I/O for application defined
interfacing. Details of the SO-DIMM-200 connector interface are included in the SO-
DIMM-200 Interface Description, as shown below.
2
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Specifications Subject to Change