LM3S3748 Datasheet, PDF (19/753 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S3748 Microcontroller
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USB Receive Dynamic FIFO Sizing (USBRXFIFOSZ), offset 0x063 .................................. 536
USB Transmit FIFO Start Address (USBTXFIFOADD), offset 0x064 ................................. 537
USB Receive FIFO Start Address (USBRXFIFOADD), offset 0x066 .................................. 537
USB Connect Timing (USBCONTIM), offset 0x07A .......................................................... 538
USB Full-Speed Last Transaction to End of Frame Timing (USBFSEOF), offset 0x07D ...... 539
USB Low-Speed Last Transaction to End of Frame Timing (USBLSEOF), offset 0x07E ...... 540
USB Transmit Functional Address Endpoint 0 (USBTXFUNCADDR0), offset 0x080 ........... 541
USB Transmit Functional Address Endpoint 1 (USBTXFUNCADDR1), offset 0x088 ........... 541
USB Transmit Functional Address Endpoint 2 (USBTXFUNCADDR2), offset 0x090 ........... 541
USB Transmit Functional Address Endpoint 3 (USBTXFUNCADDR3), offset 0x098 ........... 541
USB Transmit Hub Address Endpoint 0 (USBTXHUBADDR0), offset 0x082 ...................... 542
USB Transmit Hub Address Endpoint 1 (USBTXHUBADDR1), offset 0x08A ...................... 542
USB Transmit Hub Address Endpoint 2 (USBTXHUBADDR2), offset 0x092 ...................... 542
USB Transmit Hub Address Endpoint 3 (USBTXHUBADDR3), offset 0x09A ...................... 542
USB Transmit Hub Port Endpoint 0 (USBTXHUBPORT0), offset 0x083 ............................. 543
USB Transmit Hub Port Endpoint 1 (USBTXHUBPORT1), offset 0x08B ............................ 543
USB Transmit Hub Port Endpoint 2 (USBTXHUBPORT2), offset 0x093 ............................. 543
USB Transmit Hub Port Endpoint 3 (USBTXHUBPORT3), offset 0x09B ............................ 543
USB Receive Functional Address Endpoint 1 (USBRXFUNCADDR1), offset 0x08C ........... 544
USB Receive Functional Address Endpoint 2 (USBRXFUNCADDR2), offset 0x094 ........... 544
USB Receive Functional Address Endpoint 3 (USBRXFUNCADDR3), offset 0x09C ........... 544
USB Receive Hub Address Endpoint 1 (USBRXHUBADDR1), offset 0x08E ...................... 545
USB Receive Hub Address Endpoint 2 (USBRXHUBADDR2), offset 0x096 ....................... 545
USB Receive Hub Address Endpoint 3 (USBRXHUBADDR3), offset 0x09E ...................... 545
USB Receive Hub Port Endpoint 1 (USBRXHUBPORT1), offset 0x08F ............................. 546
USB Receive Hub Port Endpoint 2 (USBRXHUBPORT2), offset 0x097 ............................. 546
USB Receive Hub Port Endpoint 3 (USBRXHUBPORT3), offset 0x09F ............................. 546
USB Maximum Transmit Data Endpoint 1 (USBTXMAXP1), offset 0x110 .......................... 547
USB Maximum Transmit Data Endpoint 2 (USBTXMAXP2), offset 0x120 .......................... 547
USB Maximum Transmit Data Endpoint 3 (USBTXMAXP3), offset 0x130 .......................... 547
USB Control and Status Endpoint 0 Low (USBCSRL0), offset 0x102 ................................. 548
USB Control and Status Endpoint 0 High (USBCSRH0), offset 0x103 ............................... 551
USB Receive Byte Count Endpoint 0 (USBCOUNT0), offset 0x108 ................................... 553
USB Type Endpoint 0 (USBTYPE0), offset 0x10A ............................................................ 554
USB NAK Limit (USBNAKLMT), offset 0x10B .................................................................. 555
USB Transmit Control and Status Endpoint 1 Low (USBTXCSRL1), offset 0x112 ............... 556
USB Transmit Control and Status Endpoint 2 Low (USBTXCSRL2), offset 0x122 ............... 556
USB Transmit Control and Status Endpoint 3 Low (USBTXCSRL3), offset 0x132 ............... 556
USB Transmit Control and Status Endpoint 1 High (USBTXCSRH1), offset 0x113 .............. 559
USB Transmit Control and Status Endpoint 2 High (USBTXCSRH2), offset 0x123 ............. 559
USB Transmit Control and Status Endpoint 3 High (USBTXCSRH3), offset 0x133 ............. 559
USB Maximum Receive Data Endpoint 1 (USBRXMAXP1), offset 0x114 ........................... 562
USB Maximum Receive Data Endpoint 2 (USBRXMAXP2), offset 0x124 ........................... 562
USB Maximum Receive Data Endpoint 3 (USBRXMAXP3), offset 0x134 ........................... 562
USB Receive Control and Status Endpoint 1 Low (USBRXCSRL1), offset 0x116 ............... 563
USB Receive Control and Status Endpoint 2 Low (USBRXCSRL2), offset 0x126 ............... 563
USB Receive Control and Status Endpoint 3 Low (USBRXCSRL3), offset 0x136 ............... 563
USB Receive Control and Status Endpoint 1 High (USBRXCSRH1), offset 0x117 .............. 566
April 08, 2008
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Preliminary