W55P241 Datasheet, PDF (17/32 Pages) List of Unclassifed Manufacturers – I/O device usable with many different microprocessors through SPI interface

W55P241
When the corresponding bits of BU^P0F^BA ^ann^dd ^BA^PT⁰T^AA ^aa^rr^ee ^ee^qq^uu^aa^ll
Counter
255 0 1 …........... 126 127 128 …........... 254 255 0
(1)
Comparator = 0
Output
(2)
Comparator = 127
Output
(3)
Comparator = 255
“1”
Output
“0”
Figure 10 Inverted PWM output (B0x bit is equal to A0x bit)
For the chip to enter standby mode, all PWM channels have to be disabled in addition to keeping /CS
“1”.
6. CONTROL AND STATUS REGISTERS
SFRs (Special Function Registers) are basically divided into 4 groups. Note that “$” stands for
hexadecimal format.
6.1 I/O port
I/O port SFRs control I/O status.
Address Register 7
6
5
4
3
2
1
0
Attribute Default
$00
BP0B B07
B06
B05
B04
B03 B02 B01 B00
R/W
0000_0000
$01
BP1B B17
B16
B15
B14
B13 B12 B11 B10
R/W
0000_0000
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