W55P241 Datasheet, PDF (15/32 Pages) List of Unclassifed Manufacturers – I/O device usable with many different microprocessors through SPI interface

W55P241
host and no dedicated WAKEUP pad is needed. By reading from WKCTL ($0F), the last data bit (bit0)
is forced to “0” until the wakeup conditions match. After wakeup conditions match (any input pad with
change of status), the rising edge on DI pad can wake up the host. Users can read data from WKCTL
($0F) to find the cause of wakeup port and then check BP0P ($0C), BP1P ($0D) or BP2P ($0E) for the
dedicated pad. Note that after wakeup conditions match, the WAKEN bit (KC0EN, KC1EN and KC2EN
bits are not affected) is automatically set to “0.” WAKEN bit must be enabled again if wakeup is to be
used later. Reading BP0P sets the P0C bit to “0.” Reading BP1P sets the P1C bit to “0.” Reading BP2P
sets the P2C bit to “0.” Only when P0C, P1C and P2C bits are all “0”s is the WKFLG bit set to “0.”
/CS
7 6 5 43 2 1 0 76 5 4 3 2 1 0
CLK
DI
0 C6 0 0 1 1 1 1 X X X X X X X X
DO
HZ
R7 R6 R5 R4 R3 R2 R1 0 _…
Wakeup condition matches
Cn: command bit. Rn: read data bit.
HZ: high impedance. X : don’t care.7 -> 0: MSB -> LSB.
Figure 8 Wakeup method 1
In way 2, a dedicated WAKEUP pad (instead of the DO pad) wakes up the host. The WAKEUP pad
keeps floating until wakeup conditions match. After wakeup conditions match, the WAKEUP pad is
forced to “0.” When the WKFLG bit is set to “0,” the WAKEUP pad is not forced to “0” and remains
floating until wakeup conditions match again. Because the WAKEUP pad is not pulled by any internal
resistor, the host or the system board must have a pull-high resistor for wakeup to work smoothly.
5.5 256-Level Output
The W55P241 provides 8 256-level output controls in BP00~BP07 respectively. A dedicated counter is in
charge of the 256-level output function. It is also used in motor control. The internal ring oscillator runs
@ 8MHz and one PWM period consists of 256 PWM clocks whose frequencies are derived by dividing
the original ring oscillator clock by 16, 64, 256 or 512. The basic PWM period can be selected by
PWMCK. BP03, BP02, BP01 and BP00 have one identical PWM period while BP07, BP06, BP05 and
BP04 may have another identical PWM period. Because the default statuses of BP0[7:0] are general
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