JH162A Datasheet, PDF (12/25 Pages) List of Unclassifed Manufacturers – SPECIFICATIONS FOR LCD MODULE

JH162A SERIES
JEWEL HILL
10. Instruction Code:
Instruction
Code
RS
R/W
DB
7
DB6 DB5DB4DB3DB2DB1DB0
Description
E-Cycle
f_OSC=270kH
z
Write “20H” to DDRAM
Clear Display 0 0 0 0 0 0 0 0 0 1 and set DDRAM to “00H”
1.53ms
from AC
Set DDRAM address to
“00H” from AC and return
Return Home 0
0
0
0
0
0
0
0
1
-
cursor to its original position
if shifted.
1.53ms
The contents of DDRAM are
not changed.
I/ S ^{Assign cursor moving}
Entry Mode 0 0 0 0 0 0 0 1
direction and enable the shift
D H _{of entire display}
39µs
Display
ON/OFF
Control
Set display(D), cursor(C),
0 0 0 0 0 0 1 D C B and blinking of cursor(B)
on/off control bit
39µs
Set cursor moving and
Cursor or
Display Shift
0
00
0
0
S/ R/
1
-
CL
-
display shift control bit, and
the direction, without
changing of DDRAM data
39µs
Set interface data length(DL),
D
numbers of display
Function Set 0 0 0 0 1
NF - -
L
line(N: 2-line/1-line) and,
display font type(F:5*11/5*8)
39µs
Set CGRAM
Address
0
0 0 1 ^{AC AC AC AC AC AC Set CGRAM address in}
5 4 3 2 1 0 address counter(AC)
39µs
Set DDRAM
Address
0
0 1 ^{AC AC AC AC AC AC AC Set DDRAM address in}
6 5 4 3 2 1 0 address counter(AC)
39µs
Whether during internal
Read Busy
AC AC AC AC AC AC AC ^{operation or not can be}
Flag and 0 1 BF
known by reading BF. The
0µs
Address
6 5 4 3 2 1 0 _{contents of address counter}
can also be read
Write Data to
RAM
1
0 D7 D6 D5 D4 D3 D2 D1 D0 ^{Write data into internal}
RAM(DDRAM/CGRAM)
43µs
Read Data
from Ram
1 1 D7 D6 D5 D4 D3 D2 D1 D0 ^{Read data from internal}
RAM(DDRAM/CGRAM)
43µs
NOTE: When an MPU program with checking the Busy Flag(DB7) is made, it must be
necessary 1/2Fosc for executing the nest instruction by the falling
edge of the ‘E’ signal after the Busy Flag (DB7) goes to “Low”
9/ 22