LM3S8971 Datasheet, PDF (115/577 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S8971 Microcontroller
Register 29: Software Reset Control 2 (SRCR2), offset 0x048
Writes to this register are masked by the bits in the Device Capabilities 4 (DC4) register.
Software Reset Control 2 (SRCR2)
Base 0x400F.E000
Offset 0x048
Type R/W, reset 0x00000000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved EPHY0 reserved EMAC0
reserved
Type RO
R/W
RO
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
GPIOH GPIOG GPIOF GPIOE GPIOD GPIOC GPIOB GPIOA
Type RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31
30
29
28
27:8
7
6
5
4
3
2
Name
reserved
EPHY0
reserved
EMAC0
reserved
GPIOH
GPIOG
GPIOF
GPIOE
GPIOD
GPIOC
Type
RO
R/W
RO
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PHY0 Reset Control
Reset control for Ethernet PHY unit 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
MAC0 Reset Control
Reset control for Ethernet MAC unit 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Port H Reset Control
Reset control for GPIO Port H.
Port G Reset Control
Reset control for GPIO Port G.
Port F Reset Control
Reset control for GPIO Port F.
Port E Reset Control
Reset control for GPIO Port E.
Port D Reset Control
Reset control for GPIO Port D.
Port C Reset Control
Reset control for GPIO Port C.
October 01, 2007
115
Preliminary