ZADCS0882_11 Datasheet, PDF (11/27 Pages) List of Unclassifed Manufacturers – 8-Bit, 300ksps, ADC Family

ZADCS0882/0842/0822
8-Bit, 300ksps, ADC Family
1.5. Electrical Characteristics
1.5.1. General Parameters
(VDD = +2.7V to + 5.25V; f_SCLK = 3.3MHz (50% duty cycle); 11 clocks/conversion cycle (300 ksps); V_REF = 2.500V applied to VREF pin; _OP = _OPmin …
 _OPmax)
Parameter
Symbol Conditions
Min
Typ Max Unit
DC Accuracy
Resolution
Relative Accuracy
No Missing Codes
Differential Nonlinearity
Offset Error
Gain Error
Gain Temperature Coefficient
INL
NMC
DNL
ZADCS0882 / ZADCS0882V
ZADCS0842 / ZADCS0842V
ZADCS0822 / ZADCS0822V
ZADCS0882 / ZADCS0882V
ZADCS0842 / ZADCS0842V
ZADCS0822 / ZADCS0822V
8
Bits
 0.25 LSB
8
Bits
 0.25 LSB
 0.25
 0.25
 0.25
 1.0
 1.0
LSB
LSB
ppm/°C
Dynamic Specifications (10kHz sine-wave input, 0V to 2.500Vpp, 300ksps, 3.3MHz external clock)
Signal-to-Noise + Distortion Ratio SINAD
Total Harmonic Distortion
THD
Up to the 5^th harmonic
49
dB
-66 dB
Spurious-Free Dynamic Range SFDR
64
dB
Small-Signal Bandwidth
-3dB roll off
3.8
MHz
Conversion Rate
Sampling Time
(= Track/Hold Acquisition Time)
t _ACQ
Conversion Time
t _CONV
Aperture Delay
Aperture Jitter
External Clock Frequency
Internal Clock Frequency
Ext. Clock
acquisition
=
3.3MHz,
2.5
clocks/
0.758
Ext. Clock = 3.3MHz, 8 clocks/
conversion
Int. Clock = 3.3MHz +/- 12% tolerance 2.20
0.1
2.81
µs
2.43 µs
2.80 µs
30
ns
< 50
ps
3.3 MHz
3.3
3.58 MHz
Analog Inputs
Input Voltage Range, Single-
Ended and Differential
Input Capacitance
Unipolar, COM = 0V
Bipolar, COM = VREF/2
0 to VREF
V
 VREF / 2
16
pF
Data Sheet
October 12, 2011
© 2011 Zentrum Mikroelektronik Dresden AG — Rev. 2.0
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
changes without notice.
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