MC80F0224 Datasheet, PDF (70/128 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

MC80F0208/16/24
Preliminary
14.6 PWM Mode
The MC80F0208/16/24 has a high speed PWM (Pulse Width
Modulation) functions which shared with Timer3.
In PWM mode, pin R54/PWM3O outputs up to a 10-bit resolu-
tion PWM output. This pin should be configured as a PWM out-
put by setting "1" bit PWM3O in PSR0 register.
The period of the PWM3 output is determined by the T3PPR (T3
PWM Period Register) and T3PWHR[3:2] (bit3,2 of T3 PWM
High Register) and the duty of the PWM output is determined by
the T3PDR (T3 PWM Duty Register) and T3PWHR[1:0] (bit1,0
of T3 PWM High Register).
The user writes the lower 8-bit period value to the T3PPR and the
higher 2-bit period value to the T3PWHR[3:2]. And writes duty
value to the T3PDR and the T3PWHR[1:0] same way.
The T3PDR is configured as a double buffering for glitchless
PWM output. In Figure 14-20, the duty data is transferred from
the master to the slave when the period data matched to the count-
ed value. (i.e. at the beginning of next duty cycle)
PWM3 Period = [PWM3HR[3:2]T3PPR] X Source Clock
PWM3 Duty = [PWM3HR[1:0]T3PDR] X Source Clock
The relation of frequency and resolution is in inverse proportion.
Table 14-4 shows the relation of PWM frequency vs. resolution.
If it needed more higher frequency of PWM, it should be reduced
resolution.
Resolution _T3CK[1:0]
= 00(250nS)
10-bit
3.9kHz
9-bit
7.8kHz
8-bit
15.6kHz
7-bit
31.2kHz
Frequency
T3CK[1:0]
= 01(1uS)
1.95kHz
3.90kHz
7.81kHz
15.6kHz
T3CK[1:0]
= 10(4uS)
0.97kHz
1.95kHz
3.90kHz
7.8kHz
Table 14-4 PWM Frequency vs. Resolution at 4MHz
The bit POL of TM3 decides the polarity of duty cycle.
If the duty value is set same to the period value, the PWM output
is determined by the bit POL (1: High, 0: Low). And if the duty
value is set to "00_H", the PWM output is determined by the bit
POL (1: Low, 0: High).
It can be changed duty value when the PWM output. However the
changed duty value is output after the current period is over. And
it can be maintained the duty value at present output when
changed only period value shown as Figure 14-22. As it were, the
absolute duty time is not changed in varying frequency. But the
changed period value must greater than the duty value.
Note: If changing the Timer3 to PWM function, it should be
stop the timer clock firstly, and then set period and duty reg-
ister value. If user writes register values while timer is in op-
eration, these register could be set with certain values.
Ex) Sample Program @4MHz 4uS
LDM
LDM
LDM
LDM
LDM
TM3,#1010_1000b ; Set Clock & PWM3E
T3PPR,#199
; Period :800uS=4uSX(199+1)
T3PDR,#99
; Duty:400uS=4uSX(99+1)
PWM3HR,00H
TM3,#1010_1011b ; Start timer3
66
MAR. 2005 Ver 0.2