MA828 Datasheet, PDF (7/16 Pages) List of Unclassifed Manufacturers – THREE-PHASE PULSE WIDTH MODULATION WAVEFORM GENERATOR

MA828
PWM SIGNAL
BEFORE
PULSE DELETION
PWM SIGNAL
AFTER
PULSE DELETION
,tpd
.tpd
.tpd .tpd .tpd .tpd .tpd
,tpd
.tpd .tpd
PULSE
DELETED
PULSE
DELETED
tpd = PULSE DELETION TIME
Fig. 10 The effect of the pulse deletion circuit
Control Register Programming
The control register should only be programmed once the
initialisation register contains the basic operating parameters of
the MA828.
As with the initialisation register, control register data is
loaded into the three 8-bit temporary registers R0 - R2. When all
the data has been loaded into these registers it is transferred into
the 24-bit control register by writing to the dummy register R3. It
is recommended that all three temporary registers are updated
before writing to R3 in order to ensure that a conformal set of data
is transferred to the control register for execution.
PFS₇ PFS₆ PFS₅ PFS₄ PFS₃ PFS₂ PFS₁ PFS₀
Output inhibit selection
When active (i.e., Iow) the output inhibit bit INH sets all the
PWM outputs to the off (low) state. No other internal operation of
the device is affected. When the inhibit is released the PWM
outputs continue immediately. Note that as the inhibit is asserted
after the pulse deletion and pulse delay circuits, pulses shorter
than the normal minimum pulse width may be produced initially.
Overmodulation selection
The overmodulation bit OM is, in effect, the ninth bit (MSB) of the
amplitude word. When active (i.e., high) the output waveform will be
controlled in the 100% to 200% range by the amplitude word.
The percentage amplitude control is now given by:
Overmodulated Amplitude = A_POWER 3 100%
POWER
FREQUENCY
SELECT WORD
BITS 0-7
PFS0 = LSB
where A_POWER = the power amplitude
V
Fig. 11 Temporary register R0
0
t
F/R OM INH X PFS₁₁ PFS₁₀ PFS₉ PFS₈
OVERMOD-
ULATION
BIT
0 = DISABLED
1 = ACTIVE
DON’T
CARE
POWER
FREQUENCY
SELECT WORD
BITS 8-11
PFS11 = MSB
FORWARD/
REVERSE BIT
0 = FORWARD
1 = REVERSE
OUTPUT
INHIBIT BIT
0 = DISABLED
1 = ACTIVE
Fig. 12 Temporary register R1
Power frequency selection
The power frequency is selected as a proportion of the power
frequency range (defined in the initialisation register) by the 12-
bit power frequency select word, PFS, allowing the power
frequency to be defined in 4096 equal steps. As the PFS word
spans the two temporary registers R0 and R1 it is therefore
essential, when changing the power frequency, that both these
registers are updated before writing to R3.
The power frequency (f_POWER) is given by:
f_POWER
= ^fRANGE3
4096
pfs
where pfs = decimal value of the 12-bit PFS word and f_RANGE =
power frequency range set in the initialisation register.
OVERMODULATION BIT NOT SET
V
(100% MODULATION)
0
t
OVERMODULATION BIT SET
(200% MODULATION)
Fig. 13 Voltage waveforms as seen at the motor terminals,
showing the effect of setting the overmodulation bit
Forward/ reverse selection
The phase sequence of the three-phase PWM output
waveforms is controlled by the Forward/Reverse bit F/R. The
actual effect of changing this bit from 0 (forward) to 1 (reverse)
is to reverse the power frequency phase counter from
incrementing the phase angle to decrementing it. The required
output waveforms are all continuous with time during a forward/
reverse change.
In the forward mode the output phase sequence is red-
yellow-blue and in the reverse mode the sequence is blue-
yellow-red.
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