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SD1010A Datasheet, PDF (35/45 Pages) List of Unclassifed Manufacturers – Analog-Interface XGA TFT LCD Display Controller | |||
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SmartASIC, Inc.
SD1010A
Control_C
Control_D
November, 1999
Revision B
Bit [5]: Frame Modulation Mode:
0: 2-bit mode(default)
1: 1-bit mode
Bit [6]: 6-bit Panel Rounding Enable:
0: disable(default)
1: enable
Bit [7]: Frame Modulation Scheme Selection:
0: Scheme A(default)
1: Scheme B
8 RW 2EH[7:0] Control Register C
Bit [1:0]: Horizontal Interpolation Special Processing
Mode:
0: disable
1: linear
2: replication(default)
3: invalid
Bit [3:2]: Vertical Interpolation Special Processing
Mode:
0: disable
1: linear
2: replication(default)
3: invalid
Bit [4]: OSD Transparency Enable:
0: disable(default)
1: enable
*also need to program registers âOSD R Weightâ,
âOSD G Weightâ and âOSD B Weightâ
Bit [5]: Advanced Post Processing Enable:
0: disable(default)
1: enable
*also need to specify registers âAdvanced Processing R
Weightâ, âAdvanced Processing G Weightâ,
âAdvanced Processing B Weightâ , âAdvanced
Processing R Valueâ, âAdvanced Processing G Valueâ
and âAdvanced Processing B Valueâ for properly
functioning
Bit [6]: Dithering Scheme Selection
0: Scheme A(default)
1: Scheme B
Bit [7]: Reserved
8 RW 2FH[7:0] Control Register D
Bit [3:0]: Advanced Processing Shift Amount. From 0
â 8. 8 is the default value.
Bit [4]: Advance Mixing Shift Enable
0: disable(default)
1: enable
SmartASIC Confidential
35
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