COM20051 Datasheet, PDF (33/82 Pages) List of Unclassifed Manufacturers – Integrated Microcontroller and ARCNET (ANSI 878.1) Interface

BIT BIT NAME
7 Read Data
6 Auto Increment
Table 10 - Address Pointer High Register
SYMBOL
DESCRIPTION
RDDATA
This bit tells the ARCNET core whether the following
access will be a read or write. A logic "1" prepares the
device for a read, a logic "0" prepares it for a write.
AUTOINC
This bit controls whether the address pointer will
increment automatically. A logic "1" on this bit allows
automatic increment of the pointer after each access,
while a logic "0" disables this function. Please refer to
the Sequential Access Memory section for further detail.
5-2 (reserved)
1-0 Address 9-8
A9-A8
These bits are undefined.
These bits hold the upper two address bits which provide
addresses to RAM.
BIT BIT NAME
7-0 Address 7-0
Table 11 - Address Pointer Low Register
SYMBOL
DESCRIPTION
A7-A0
These bits hold the lower 8 address bits which provide
the addresses to RAM.
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