IT8702F Datasheet, PDF (30/173 Pages) List of Unclassifed Manufacturers – Super-Low Pin Count Input/Output (LPC I/O)

IT8702F
Pin(s) No.
121
120
119
118
Symbol
JP2
DTR1#/
JP1
CTS1#
RI1#
DCD1#
Attribute
DI
DO8/
DI
DI
DI
DI
Power
VCC
VCC
VCC
VCC
Description
When this signal is low, this output indicates to the MODEM
or data set that the device is ready to send data. RTS# is
activated by setting the appropriate bit in the MCR register to
1. After a Master Reset operation or during Loop mode, RTS#
is set to its inactive state.
During LRESET#, this pin is input for JP2 power-on strapping
option
Data Terminal Ready 1 #.
DTR# is used to indicate to the MODEM or data set that the
device is ready to exchange data. DTR# is activated by
setting the appropriate bit in the MCR register to 1. After a
Master Reset operation or during Loop mode, DTR# is set to
its inactive state.
During LRESET#, this pin is input for JP1 power-on strapping
option
Clear to Send 1 #.
When the signal is low, it indicates that the MODEM or data
set is ready to accept data. The CTS# signal is a MODEM
status input whose condition can be tested by reading the
MSR register.
Ring Indicator 1 #.
When the signal is low, it indicates that a telephone ring
signal has been received by the MODEM. The RI# signal is a
MODEM status input whose condition can be tested by
reading the MSR register.
Data Carrier Detect 1 #.
When the signal is low, it indicates that the MODEM or data
set has detected a carrier. The DCD# signal is a MODEM
status input whose condition can be tested by reading the
MSR register.
Table 5-8. Pin Description of Serial Port 2 Signals
Pin(s) No.
6
5
3
2
1
Symbol
SIN2
SOUT2/JP6
DSR2#
RTS2#/JP5
DTR2#/
JP4
Attribute
DI
DO8/DI
DI
DO8/DI
DO8/DI
Power
VCC
VCC
VCC
VCC
VCC
Description
Serial Data In 2.
This input receives serial data from the communications link.
Serial Data Out 2.
This output sends serial data to the communications link. This
signal is set to a marking state (logic 1) after a Master Reset
operation or when the device is in one of the Infrared
communications modes. During LRESET#, this pin is input for
JP6 power-on strapping option
Data Set Ready 2 #.
When low, indicates that the MODEM or data set is ready to
establish a communications link. The DSR# signal is a
MODEM status input whose condition can be tested by
reading the MSR register.
Request to Send 2 #.
When low, this output indicates to the MODEM or data set
that the device is ready to send data. RTS# is activated by
setting the appropriate bit in the MCR register to 1. After a
Master Reset operation or during Loop mode, RTS# is set to
its inactive state. During LRESET#, this pin is input for JP5
power-on strapping option
Data Terminal Ready 2 #.
DTR# is used to indicate to the MODEM or data set that the
device is ready to exchange data. DTR# is activated by
setting the appropriate bit in the MCR register to 1. After a
Master Reset operation or during Loop mode, DTR# is set to
its inactive state.
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IT8702F V0.5