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SI5013 Datasheet, PDF (23/24 Pages) List of Unclassifed Manufacturers – OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER | |||
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Si5013
DOCUMENT CHANGE LIST
Revision 0.2 to Revision 1.0
 Added Figure 4, âPLL Acquisition Time,â on page 6.
 Table 2 on page 7
z Updated values: Supply Current
z Updated values: Power Dissipation
z Updated values: Common Mode Input Voltage
(REFCLK)
z Updated values: Output Common Mode Voltage
 Table 3 on page 8
z Updated values: Output Clock Rise Time
z Updated values: Output Clock Fall Time
z Updated values: Clock to Data Delay tCf-D
 Table 4 on page 9
z Updated values: Jitter Tolerance (OC-12)
z Updated values: RMS Jitter Generation
z Updated values: Peak-to-Peak Jitter Generation
z Updated values: Acquisition Time (reference clock
applied)
z Updated values: Acquisition Time
(reference-less operation)
z Updated values: Freq Difference at which Receive PLL
goes out of Lock
z Updated values: Freq Difference at which Receive PLL
goes into Lock
 Removed âHysteresis Dependencyâ Figure.
 Added Figure 7, âLOS Signal Hysteresis,â on page
13.
 Corrected error: Table 8 on page 18âchanged
description for LOS_LVL from âLOS is disabled when
the voltage applied is less than 500 mVâ to âLOS is
disabled when the voltage applied is less than
1.0 V.â
Revision 1.0 to Revision 1.1
 Corrected âRevision 0.2 to Revision 1.0â Change
List.
 Table 4 on page 9
z Updated values: Jitter Tolerance (OC-3)
Revision 1.1 to Revision 1.2
 Added Figure 5, âLOS Response,â on page 6.
 Updated Table 2 on page 7.
z Added âOutput Common Mode Voltage (DOUT)â with
updated values.
z Added âOutput Common Mode Voltage (CLKOUT)â with
updated values.
 Updated Table 3 on page 8.
z Added âOutput Clock Duty CycleâOC-12/3.â
z Added âLoss-of-Signal Response Timeâ with updated
values.
 Updated Table 8 on page 18.
z Changed âclock inputâ to âDIN inputsâ for Loss Of Signal
 Updated Figure 16, â28-Lead Micro Leaded Package
(MLP),â on page 22.
 Updated Table 9, âPackage Diagram Dimensions,â
on page 22.
z Changed dimension A.
z Changed dimension E2.
Revision 1.2 to Revision 1.3
 Updated Figure 16, â28-Lead Micro Leaded Package
(MLP),â on page 22.
 Updated Table 9, âPackage Diagram Dimensions,â
on page 22.
Revision 1.3 to Revision 1.4
 Updated "Features" on page 1.
 Table 2 on page 7.
z Updated supply current values.
z Updated power dissipation values.
z Updated differential output voltage swing
(DOUT and CLKOUT).
 Table 3 on page 8.
z Added output clock rate values.
z Updated duty cycle values.
z Updated slice accuracy values.
 Table 4 on page 9.
z Updated jitter tolerance values (OC-12 mode).
z Updated acquisition time values.
z Updated reference clocks range.
z Updated reference clocks tolerance.
 "3.Typical Application Schematic" on page 11.
z Added 1% to Rext.
 "4.11.PLL Performance" on page 14.
z Removed OC-24 note.
 Table 8 on page 18.
z Added no-hysteresis text to BER_LVL.
 Updated "6.Ordering Guide" on page 21.
z Added âXâ to part number.
Rev. 1.4
23
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