SI5013 Datasheet, PDF (17/24 Pages) List of Unclassifed Manufacturers – OC-12/3, STM-4/1 SONET/SDH CDR IC WITH LIMITING AMPLIFIER

Si5013
Signal
source
0.1 PF
Zo = 50 :
100 :
Si5013
2.5 V
(±5%)
DIN+
50 :
5 k:
DIN–
50 :
7.5 k:
0.1 PF
GND
Figure 13. Single-Ended Input Termination for DIN (ac coupled)
4.19. Differential Output Circuitry
The Si5013 utilizes a current-mode logic (CML) architecture to output both the recovered clock (CLKOUT) and
data (DOUT). An example of output termination with ac coupling is shown in Figure 14. In applications in which
direct dc coupling is possible, the 0.1 PF capacitors may be omitted. The differential peak-to-peak voltage swing of
the CML architecture is specified in Table 2 on page 7.
Si5013
2.5 V (±5%)
100 :
DOUT+,
CLKOUT+
0.1 PF
VDD
50 :
Zo = 50 :
DOUT–,
CLKOUT– ^{0.1 PF}
Zo = 50 :
100 :
2.5 V (±5%)
50 :
VDD
Figure 14. Output Termination for DOUT and CLKOUT (ac coupled)
Rev. 1.4
17