CM16022ASFAYA-03 Datasheet, PDF (13/26 Pages) List of Unclassifed Manufacturers – LCD MODULE SPECIFICATION

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10.1 INSTRUCTIONS
Instruction
Instruction Code
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
DESCRIPTION
Executed
Time( fosc
=270KHz)
Clear Display
0
0
0
0
0
0
0
0
0
Write “20H” to DDRAM and set
1 _{DDRAM address to “00H ” from AC}
1.53mS
Set DDRAM address to “00H” from
Cursor At Home
0
0
0
0
0
0
0
0
1
AC and return cursor to its original
- _{Position if shifted.}
1.53mS
The contents of DDRAM are not
changed.
Entry Mode Set
Assign cursor moving direction and
0 0 0 0 0 0 0 1 I/D SH _{enable the shift of entire display.}
39µS
Display On/Off
Control
Set display (D), cursor(C), and
0 0 0 0 0 0 1 D C B _{Blinking of cursor(B) ON/OFF control 39µS}
bit.
Cursor or
Display
Shift
Function Set
Set cursor moving and display shifts
0 0 0 0 0 1 S/C R/L - - _{cursor bit, and the direction, without 39µS}
changing of DDRAM data.
Sets interface data length
0
0
0
0
1 DL N F
-
-
(DL:8-BIT/4-BIT), number of display
lines(N:2-line/1-line) and, display font
39µS
type (F:5x11dots/5x8 dots).
Set CGRAM
Address
Set CGRAM address in address
0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 _counter.
39µS
Set DDRAM
Address
Set DDRAM address in address
0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 _counter.
39µS
Read Busy
Flag and
Address
Whether during internal operation or
0
1
not can be known by reading BF.
BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 _{The contents of address counter can}
0µS
also be read.
Write Data to
RAM
Write data into internal RAM
1 0 D7 D6 D5 D4 D3 D2 D1 D0 _{(DDRAM / CGRAM)}
43µS
Read Data
from RAM
Reads data from internal RAM
1 1 D7 D6 D5 D4 D3 D2 D1 D0 _{(DDRAM / CGRAM).}
43µS
*"-":don’t care
NOTE : When an MPU program with checking the Busy Flag(DB7) is made, it must be necessary 1/2Fosc
is necessary for executing the next instruction by the falling edge of the ‘E’ signal after the Busy
Flag(DB7)goes to “LOW” .
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