MC80F0204 Datasheet, PDF (100/126 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

MC80F0104/0204
Preliminary
20. RESET
The MC80F0104/0204 supports various kinds of reset as
below.
• Power-On Reset (POR)
• RESET (external reset circuitry)
RESET
POR
(Power-On Reset)
Noise Canceller
Address Fail reset
PFD
(Power-Fail Detection)
WDT
(WDT Timeout Reset)
• Watchdog Timer Timeout Reset
• Power-Fail Detection (PFD) Reset
• Address Fail Reset
S
Q
Overflow
R
Clear
BIT
Internal
RESET
Figure 20-1 RESET Block Diagram
The on-chip POR circuit holds down the device in RESET
until V_DD has reached a high enough level for proper op-
eration. It will eliminate external components such as reset
IC or external resistor and capacitor for external reset cir-
cuit. In addition that the RESET pin can be used to normal
input port R35 by setting “POR” and “R35EN” bit Config-
uration Area(20FFH) in the Flash programming. When the
device starts normal operation, its operating parmeters
(voltage, frequency, temperature...etc) must be met.
.Table 20-1 shows on-chip hardware initialization by reset
action.
On-chip Hardware
Program counter
(PC)
RAM page register (RPR)
G-flag
(G)
Operation mode
Initial Value
(FFFF_H) - (FFFE_H)
0
0
Main-frequency clock
On-chip Hardware
Peripheral clock
Watchdog timer
Control registers
Power fail detector
Initial Value
Off
Disable
Refer to Table 8-1 on page 25
Disable
Table 20-1 Initializing Internal Status by Reset Action
The reset input is the RESET pin, which is the input to a
Schmitt Trigger. A reset in accomplished by holding the
RESET pin low for at least 8 oscillator periods, within the
operating voltage range and oscillation stable, it is applied,
and the internal state is initialized. After reset, 65.5ms (at
4 MHz) add with 7 oscillator periods are required to start
execution as shown in Figure 20-2 .
Internal RAM is not affected by reset. When V_DD is turned
on, the RAM content is indeterminate. Therefore, this
RAM should be initialized before read or tested it.
When the RESET pin input goes to high, the reset opera-
tion is released and the program execution starts at the vec-
tor address stored at addresses FFFE_H - FFFF_H.
A connection for simple power-on-reset is shown in Figure
20-1 .
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Mar. 2005 Ver 0.2