VMX51C900 Datasheet, PDF (5/55 Pages) List of Unclassifed Manufacturers – Versa Mix 8051 MCU with LCD Controller and ADC

VMX51C900
DIP-40 Pin Descriptions
TABLE 3: VMX51C900 PIN DESCRIPTIONS FOR DIP40 PACKAGE
DIP -
40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Name
T2
P1.0
T2EX
P1.1
P1.2
PWMA
P1.3
P1.4
PWMB
P1.5
P1.6
P1.7
RES
RXD
P3.0
TXD
P3.1
#INT0
P3.2
#INT1
P3.3
ADCIN0
T0
P3.4
ADCIN1
T1
P3.5
ADCIN2
#WR
P3.6
ADCIN3
#RD
P3.7
XTAL2
XTAL1
VSS
LCDCOM0
P2.0
A8
LCDCOM1
P2.1
A9
LCDCOM2
P2.2
A10
LCDCOM3
P2.3
A11
LCDSEG0
P2.4
A12
LCDSEG1
P2.5
A13
LCDSEG2
P2.6
A14
I/O
Function
I
Timer 2 Clock Out
I/O Bit 0 of Port 1
I
Timer 2 Control
I/O Bit 1 of Port 1
I/O Bit 2 of Port 1
O PWM Channel A
I/O Bit 3 of Port 1
I/O Bit 4 of Port 1
O PWM Channel B
I/O Bit 5 of Port 1
I/O Bit 6 of Port 1
I/O Bit 7 of Port 1
I
Reset
I
Receive Data
I/O Bit 0 of Port 3
O Transmit Data &
I/O Bit 1 of Port 3
I
External Interrupt 0
I/O Bit 2 of Port 3
I
External Interrupt 1
I/O Bit 3 of Port 3
Ain ADC input 0
I
Timer 0
I/O Bit 4 of Port 3
Ain ADC input 1
I
Timer 1 & 3
I/O Bit 5 of Port
Ain ADC input 2
O Ext. Memory Write
I/O Bit 6 of Port 3
Ain ADC input 3
O Ext. Memory Read
I/O Bit 7 of Port 3
O Oscillator/Crystal Output
I
Oscillator/Crystal In
-
Ground
-
LCD Driver Common 0
I/O Bit 0 of Port 2
O Bit 8 of Ext. Memory Address
-
LCD Driver Common 1
I/O Bit 1 of Port 2
O Bit 9 of Ext. Memory Address
-
LCD Driver Common 2
I/O Bit 2 of Port 2
O Bit 10 of Ext. Memory Address
-
LCD Driver Common 3
I/O Bit 3 of Port 2 &
O Bit 11 of Ext. Memory Address
-
LCD Segment 0
I/O Bit 4 of Port 2
O Bit 12 of Ext. Memory Address
-
LCD Segment 1
I/O Bit 5 of Port 2
O Bit 13 of External Memory Address
-
LCD Segment 2
I/O Bit 6 of Port 2
O Bit 14 of External Memory Address
PLCC
- 44
Name
I/O
Function
LCDSEG3 -
LCD Segment 3
28 P2.7
I/O Bit 7 of Port 2
A15
O Bit 15 of External Memory Address
29
LCDSEG4
#PSEN
-
O
LCD Segment 4
Program Store Enable
30
LCDSEG5
ALE
-
O
LCD Segment 5
Address Latch Enable
31 #EA
I
External Access
LCDSEG6 -
LCD Segment 6
32 P0.7
I/O Bit 7 Of Port 0
AD7
I/O Data/Address Bit 7 of Ext. Memory
LCDSEG7 -
LCD Segment 7
33 P0.6
I/O Bit 6 of Port 0
AD6
I/O Data/Address Bit 6 of Ext. Memory
LCDSEG8 -
LCD Segment 8
34 P0.5
I/O Bit 5 of Port 0
AD5
I/O Data/Address Bit 5 of Ext. Memory
LCDSEG9 -
LCD Segment 9
35 P0.4
I/O Bit 4 of Port 0
AD4
I/O Data/Address Bit 4 of Ext. Memory
LCDSEG10 -
LCD Segment 10
36 P0.3
I/O Bit 3 Of Port 0
AD3
I/O Data/Address Bit 3 of Ext. Memory
LCDSEG11 -
LCD Segment 11
37 P0.2
I/O Bit 2 of Port 0
AD2
I/O Data/Address Bit 2 of Ext. Memory
LCDSEG12 -
LCD Segment 12
38 P0. 1
I/O Bit 1 of Port 0 & Data
AD1
I/O Address Bit 1 of Ext. Memory
LCDSEG13 -
LCD Segment 13
39 P0.0
I/O Bit 0 Of Port 0 & Data
AD0
I/O Address Bit 0 of Ext. Memory
40 VDD
-
5V supply
T2 / P1.0
T2EX / P1.1
PWMA / P1.2
P1.3
P1.4
PWMB / P1.5
P1.6
P1.7
RESET
RXD / P3.0
TXD / P3.1
#INT0 / P3.2
#INT1 / P3.3
ADCIN0 / T0 / P3.4
ADCIN1 / T1 / P3.5
ADCIN2 / #WR / P3.6
ADCIN3 / #RD / P3.7
XTAL2
XTAL1
VSS
1
40
2
39
3
38
4
37
5
36
6
35
7
34
8
33
9
32
VMX51C900
10
DIP-40
31
11
30
12
29
13
28
14
27
15
26
16
25
17
24
18
23
19
22
20
21
VDD
P0.0 / AD0 / LCDSEG13
P0.1 / AD1 / LCDSEG12
P0.2 / AD2 / LCDSEG11
P0.3 / AD3 / LCDSEG10
P0.4 / AD4 / LCDSEG9
P0.5 / AD5 / LCDSEG8
P0.6 / AD6 / LCDSEG7
P0.7 / AD7 / LCDSEG6
#EA / VPP
ALE / LCDSEG5
PSEN / LCDSEG4
P2.7 / A15 / LCDSEG3
P2.6 / A14 / LCDSEG2
P2.5 / A13 / LCDSEG1
P2.4 / A12 / LCDSEG0
P2.3 / A11 / LCDCOM3
P2.2 / A10 / LCDCOM2
P2.1 / A9 / LCDCOM1
P2.0 / A8 / LCDCOM0
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