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MTD505 Datasheet, PDF (4/19 Pages) List of Unclassifed Manufacturers – 5 Port 10M/100M Ethernet Switch
MYSON
TECHNOLOGY
MTD505
(Preliminary)
2.0 PIN DESCRIPTIONS
RMII/MII Port Interface Pins
Name
CRSDV0
RXD0_0
RXD0_1
TXEN0
TXD0_0
TXD0_1
CRSDV1
RXD1_0
RXD1_1
TXEN1
TXD1_0
TXD1_1
CRSDV2
RXD2_0
RXD2_1
TXEN2
TXD2_0
TXD2_1
CRSDV3
RXD3_0
RXD3_1
TXEN3
TXD3_0
TXD3_1
CRSDV4
RXDV4
RXCLK4
RXD4_3
RXD4_2
RXD4_0
RXD4_1
TXEN4
TXCLK4
Pin Number
119
123
124
122
121
120
125
01
02
128
127
126
03
09
10
06
05
04
11
15
16
14
13
12
17
26
25
32
31
29
30
23
24
I/O
Descriptions
I Port0 RMII receive interface signal, CRSDV0 is asserted high when
port0 media is non_idle.
I Port0 RMII receive data bit_0.
I Port0 RMII receive data bit_1.
O Port0 RMII transmit enable signal.
O Port0 RMII transmit data bit_0.
O Port0 RMII transmit data bit_1.
I Port1 RMII receive interface signal, CRSDV1 is asserted high when
port1 media is non_idle.
I Port1 RMII receive data bit_0.
I Port1 RMII receive data bit_1.
O Port1 RMII transmit enable signal.
O Port1 RMII transmit data bit_0.
O Port1 RMII transmit data bit_1.
I Port2 RMII receive interface signal, CRSDV2 is asserted high when
port2 media is non_idle.
I Port2 RMII receive data bit_0.
I Port2 RMII receive data bit_1.
O Port2 RMII transmit enable signal.
O Port2 RMII transmit data bit_0.
O Port2 RMII transmit data bit_1.
I Port3 RMII receive interface signal, CRSDV0 is asserted high when
port3 media is non_idle.
I Port3 RMII receive data bit_0.
I Port3 RMII receive data bit_1.
O Port3 RMII transmit enable signal.
O Port3 RMII transmit data bit_0.
O Port3 RMII transmit data bit_1.
I Port4 RMII/MII receive interface signal, CRSDV4 is asserted high when
port4 media is non_idle.
I Port4 MII receive data valid.
In RMII mode, this pin don’t use.
I Port4 MII receive clock signal.
In RMII mode, this pin is not used.
I Port4 MII receive data bit_3. In RMII mode, this pin don’t use.
I Port4 MII receive data bit_2. In RMII mode, this pin don’t use.
I Port4 RMII/MII receive data bit_0.
I Port4 RMII/MII receive data bit_1.
O Port4 RMII transmit enable signal.
I Port4 RMII transmit clock signal.
In RMII mode, this pin is not used.
4/19
MTD505 Revision 1.2 14/04/2000