MTD505 Datasheet, PDF (13/19 Pages) List of Unclassifed Manufacturers – 5 Port 10M/100M Ethernet Switch

MYSON
TECHNOLOGY
MTD505
(Preliminary)
TABLE 1. MII r egister s
GLOBAL REGISTERS
REG
NO
Bits
7-0
Name
XON
R/W
XON threshold.
XOFF threshold.
Descriptions
Default
15-8 XOFF
While EEPROM is enabled, this register’s content will
be updated by EEPROM read XON/XOFF threshold
data automatically. After EEPROM read is done, this
register can be read/write by management cmd.
default is 16’h3084(2M memory) or 16’h1838(1M mem-
ory)
2
CtlReg2 R/W
CONTROL REGISTER 2
16’d300
bit[15:0] can specify aging time.
15-0 Aging
While EEPROM is enabled, this register’s content will
be updated by EEPROM read Aging timer data auto-
matically. After EEPROM read is done, this register can
be read/write by management cmd.
3
CtlReg3 R/W
CONTROL REGISTER 3
16’h000f
bit[15:12] specify port 3’s uplink port ID.
bit[11:8] specify port 2’s uplink port ID.
15-0 Uplink reg0
bit[7:4] specify port 1’s uplink port ID.
bit[3:0] specify port 0’s uplink port ID.
default is 16’h000f.
P.S this register’s write sequence is Jumper setting ==>
EEPROM content ==> MII management command.
4
CtlReg4 R/W
CONTROL REGISTER 4
16’h0
bit[15:12] :reserved
bit[11:8] : reserved
15-0 Uplink reg1
bit[7:4] : reserved
bit[3:0] specify port 4’s uplink port ID.
default is 16’h0.
P.S this register’s write sequence is Jumper setting ==>
EEPROM content ==> MII management command.
5
CtlReg5 R/W
CONTROL REGISTER 5
16’hff
7-0
bit[7:0] specify broadcast threshold.
8
bit[8] enable enhance backpressure.
Reserved.
15-9
P.S this register can be writed by EEPROM content or
MII management command too.
6
StsReg0
RO/
RC
STATUS REGISTER 0
7-0
bit[4:0] outputs port4-0 RXDMA fifofull, bit[7:5] :
reserved.
13/19
MTD505 Revision 1.2 14/04/2000