FDC37N958FR Datasheet, PDF (310/316 Pages) List of Unclassifed Manufacturers – Notebook I/O Controller with Enhanced Keyboard and System Control

FALE
nFRD
FAD[7:0]
FA[17:8]
t1
t3
t2
FA[7:0]
FA[17:8]
t5
t4
t7
t6
t8
DATA IN
FA[7:0
FA[17:8]
FIGURE 51 - 8051 FLASH READ TIMING
Table 110 - Flash Read Timing Parameters
OSCILLATOR
PARAMETER
MIN TYP MAX
EQUATION
t1 Address Valid to FALE Low
43
T-40
t2 Address Hold Following FALE
53
Low
T-30
t3 FALE Low to nFRD Low
200
300
3T-50 / 3T+50
t4 nFRD Pulse Width
400
6T-100
t5 nFRD High to FALE High
43
123
T-40 / T+40
t6 nFRD Low to Valid Data In
252
5T-165
t7 Data Hold Following nFRD
0
0
t8 Data Float Following nFRD
107
2T-60
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
Min and Max delays shown for an 8051 clock of 12 MHz, to calculate timing delays for other clock
frequencies use the Oscillator Equations, where T=1/Fclk.
SMSC DS – FDC37N958FR
Page 304
Rev. 09/01/99