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FDC37N958FR Datasheet, PDF (255/316 Pages) List of Unclassifed Manufacturers – Notebook I/O Controller with Enhanced Keyboard and System Control
Logical Device Configuration/Control
Registers [0x30-0xFF]
Used to access the registers that are assigned
to each logical unit. This chip supports six logical
units and has six sets of logical device registers.
The logical devices are Floppy, Parallel, Serial
1 and Serial 2, Real Time Clock, and Keyboard
Controller. A separate set (bank) of control and
configuration registers exists for each Logical
Device and is selected with the Logical Device #
Register (0x07).
The INDEX PORT is used to select a specific
logical device register. These registers are then
accessed through the DATA PORT.
The Logical Device registers are accessible only
when the device is in the Configuration State
with the exception of registers 0x82-0x9A of
Logical Device 7 which are also accessible when
in the run state. The logical register addresses
are listed in table 79.
Table 79 - Logical Device Configuration Registers
LOGICAL DEVICE
REGISTER
ADDRESS
DESCRIPTION
Activate (1)
(0x30)
Bits[7:1] Reserved, set to “0”.
Bit[0]
= 1 Activates the logical device
currently selected through the Logical
Device # register.
= 0 Logical device currently selected
is inactive.
STATE
C
Logical Device Control
(0x31-0x37) Reserved - Writes are ignored, reads
C
return “0”.
Logical Device Control
(0x38-0x3f) Vendor Defined - Reserved - Writes are
C
ignored, reads return “0”.
Memory Base Address
(0x40-0x5F) Reserved - Writes are ignored, reads
C
return “0”.
I/O Base Address
(see Table )
Interrupt Select
(0x60-0x6F) All logical devices contain 0x60, 0x61.
C
0x60 =
Unused registers will ignore writes and
addr[15:8] return “0” when read.
0x61=
addr[7:0]
(0x70,072)
0x70 is implemented for each logical
device. Refer to Interrupt Configuration
C
Register description. Only the KYBD
controller uses Interrupt Select register
0x72. Unused register (0x72) will ignore
writes and return “0” when read. Interrupts
default to edge high (ISA compatible).
(0x71,0x73)
Reserved - not implemented. These
register locations ignore writes and return
“0” when read.
SMSC DS – FDC37N958FR
Page 249
Rev. 09/01/99