TC5299J Datasheet, PDF (24/32 Pages) List of Unclassifed Manufacturers – FAST ETHERNET PCMCIA LAN CONTROLLER

TC5299J
7
6
5
4
CT7 CT6 CT5 CT4
3
2
1
0
CT3 CT2 CT1 CT0
CNTR2: Monitor the number of Missed Packets
7
6
5
4
CT7 CT6 CT5 CT4
3
2
1
0
CT3 CT2 CT1 CT0
5.9 Number of Collisions Register (NCR)
This register contains the number of collisions a node experiences when attempting to transmit a packet. If no
collisions are experienced during a transmission attempt, the COL bit of the TSR will not be set and the contents of
NCR will be zero. If there are excessive collisions, the ABT bit in the TSR will be set and the contents of NCR
will be zero. The NCR is cleared after the TXP bit in the CR is set.
7
6
5
4
3
2
1
0
-
-
-
-
NC3 NC2 NC1 NC0
5.10 Physical Address Register (PAR0-PAR5)
The physical address registers are used to compare the destination address of incoming packets for rejecting or
accepting packets. Comparisons are performed on a byte-wide basis. The bit assignment shown below relates the
sequence in PAR0-PAR5 to the bit sequence of the received packet.
.. Syn Syn DA0 DA1 DA2 DA3 DA4 DA5 DA6 DA7 ..
|-------
Destination Address
--------|--- Source
PAR0
PAR1
PAR2
PAR3
PAR4
PAR5
D7
DA7
DA15
DA23
DA31
DA39
DA47
D6
DA6
DA14
DA22
DA30
DA38
DA46
D5
DA5
DA13
DA21
DA29
DA37
DA45
D4
DA4
DA12
DA20
DA28
DA36
DA44
D3
DA3
DA11
DA19
DA27
DA35
DA43
D2
DA2
DA10
DA18
DA26
DA34
DA42
D1
DA1
DA9
DA17
DA25
DA33
DA41
D0
DA0
DA8
DA16
DA24
DA32
DA40
5.11 Multicast Address Registers (MAR0-MAR7)
The Multicast address registers provide filtering of multicast addresses hashed by the CRC logic. All destination
addresses are fed through the CRC logic and as the last bit of the destination address enters the CRC, the 6 most
significant bits of the CRC generator are latched. These 6 bits are then decoded by a 1 of 64 decode to index a
unique filter bit (FB0-63) in the multicast address register. If the filter bit selected is set, the multicast packet is
accepted. The system designer would use a program to determine which filter bits to set in the multicast registers.
For some address found to hash to the value 50 (32H), then FB50 in MAR6 should be initialized to ”1” All
multicast filter bits that correspond to multicast address accepted by the node are then set to one. To accept all
multicast packets all of the registers are set to all ones.
MAR0
MAR1
MAR2
MAR3
D7
FB7
FB15
FB23
FB31
D6
FB6
FB14
FB22
FB30
D5
FB5
FB13
FB21
FB29
D4
FB4
FB12
FB20
FB28
D3
FB3
FB11
FB19
FB27
D2
FB2
FB10
FB18
FB26
D1
FB1
FB9
FB17
FB25
D0
FB0
FB8
FB16
FB24
-24-
Ver. 0.1
07/04/01