TIGER560 Datasheet, PDF (21/37 Pages) List of Unclassifed Manufacturers – USB Controller for Low Cost VoIP solutions

Tiger560
Advance Information
SPI micro-controller interface
To enable interface to many popular micro-controllers and serial peripheral devices such as
SLICs etc, a 4-wire SPI interface has been implemented.
The interface consists of a clock signal (CCLK), chip select (CSB), data input (CDIN) and data
output (CDOUT). These signals share the HA[3], HA[2], AUX[0] and AUX[1] pins. The SPI
interface is enabled when bit 5 of register0x29 is set to 1.
Registers 0x26 to 0x29 are used to control the transfer of data. Each transfer can be either a 2-
byte transfer or a 3-byte transfer. For many micro-controllers, the first byte of the transfer is the
command/address byte. The second byte is the data read or write. Generally the MSB of the first
byte indicates a read or write operation, 0 indicates a write and a 1 indicates a read.
The transfer can be programmed with a chip select (CBS) break between each byte transfer or
without CSB break between each transfer. The speed and the phase of transfer clock also can be
programmed through the Tiger560 register 0x29.
CCLK
CSB
DIN
0 a6 a5 a4 a3 a2 a1 a0
SDO
Serial write timing diagram
High impedance
d7 d6 d5 d4 d3 d2 d1 d0
CCLK
CSB
DIN
1 a6 a5 a4 a3 a2 a1 a0
SDO
Serial read timing diagram
d7 d6 d5 d4 d3 d2 d1 d0
Revision 1.1 released on 2/20/01
Page 21