TIGER560 Datasheet, PDF (19/37 Pages) List of Unclassifed Manufacturers – USB Controller for Low Cost VoIP solutions

Tiger560
Advance Information
4Mbit Parallel Port
The Tiger560 provides a 4Mbit, 8-bit parallel port interface for support of external peripherals that
require a high-speed USB interface using ISO transfer. Data can be transferred at 4Mbits/second
in each direction.
The circuitry used is shared with the EPROM interface and the 4Mbit Parallel port can only be
used in a system that does not implement the optional EPROM.
Interface signals
There are 8 bi-directional data lines and 3 control lines, RD#, WR# and VCLK.
The 11 interface lines are dual function shared pins. The data bus is shared with SDA[7:0], RD#
is shared with SAD[14], WR# is shared with SAD[13].
VCLK should be configured as an output by setting 0x00 bit 7. When set as an output VCLK will
produces a 48MHz reference clock.
Signal timing for the 4Mbit Parallel Port
512 pulses
512 pulses
RD#
512 pulses
512 pulses
WR#
1 mS
1 mS
1. In each 1mS period there will be 512 read pulses and 512 write pulses.
2. Either read or write will occur first, the determination is made by the USB hub.
3. The read and write cycles will not overlap.
VCLK
RD#
DATA
VCLK is the 48MHz reference clock.
VCLK
WR#
DATA
Revision 1.1 released on 2/20/01
Page 19