SI5022 Datasheet, PDF (16/22 Pages) List of Unclassifed Manufacturers – MULTI-RATE SONET/SDH CDR IC WITH LIMITING AMP

Si5022/Si5023
Differential Output Circuitry
The Si5022/23 utilizes a current-mode logic (CML) architecture to output both the recovered clock (CLKOUT) and
data (DOUT). An example of output termination with ac coupling is shown in Figure 12. In applications in which
direct dc coupling is possible, the 0.1 µF capacitors may be omitted. The differential peak-to-peak voltage swing of
the CML architecture is specified in Table 2.
Si5022/23
2.5 V (±5%)
100 Ω
DOUT+,
CLKOUT+
0.1 µ F
VDD
50 Ω
Zo = 50 Ω
DOUT–,
CLKOUT–
0.1 µ F
Zo = 50 Ω
100 Ω
2.5 V (±5%)
50 Ω
VDD
Figure 12. Output Termination for DOUT and CLKOUT (AC Coupled)
16
Preliminary Rev. 0.46