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SA25C020 Datasheet, PDF (15/31 Pages) List of Unclassifed Manufacturers – 2Mb EEPROM with 25MHz SPI Bus Interface
Chip Select (CSb)
The SA25C020 is selected when the CSb
pin is low. When the device is not selected,
data is not accepted via the SI pin, and the
SO pin remains in a high impedance state.
Hold Condition
The HOLDb pin is used in conjunction with
the CSb pin to select the SA25C020. When
the device is selected and a serial
sequence is underway, HOLDb can be
used to pause the serial communication
with the master device without resetting the
serial sequence.
To enter the hold condition the device must
be selected, with CSb low.
SA25C020 Advanced Information
SAIFUN
15
As shown in Figure 8, the Hold condition
starts on the falling edge of the HOLDb
signal, provided that SCK is low. The Hold
condition ends on the rising edge of the
HOLDb signal, provided that SCK is low. If
the falling edge does not coincide with SCK
being low, the Hold condition starts only
after SCK next goes low. Similarly, if the
rising edge does not coincide with SCK
being low, the Hold condition ends only
after SCK next goes low.
During the Hold condition, SO is high
impedance, and SI and SCK are Don’t
Care. In most cases, the device is kept
selected, with CSb driven low, for the entire
duration of the Hold condition, which
ensures that the internal logic state
remains unchanged from the moment it
enters the Hold condition.
NOTE:
Driving CSb high while HOLDb is still
low is not a legal operation.
SCK
HOLD
Hold
Condition
(Standard Use)
Hold
Condition
(Non-Standard Use)
Figure 8. Hold Condition