C8051F32X Datasheet, PDF (140/256 Pages) List of Unclassifed Manufacturers – Full Speed USB, 16k ISP FLASH MCU Family

C8051F320/1
Figure 14.17. P2MDOUT: Port2 Output Mode Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0xA6
Bits7-0:
Output Configuration Bits for P2.7-P2.0 (respectively): ignored if corresponding bit in register
P2MDIN is logic 0.
0: Corresponding P2.n Output is open-drain.
1: Corresponding P2.n Output is push-pull.
Note: P2.7-P2.4 only available on C8051F320 devices.
Figure 14.18. P2SKIP: Port2 Skip Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0xD6
Bits7-4:
Bits3-0:
Unused. Read = 0000b. Write = don’t care.
P2SKIP[3:0]: Port2 Crossbar Skip Enable Bits.
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as analog inputs (for
ADC or Comparator) or used as special functions (VREF input, external oscillator circuit, CNVSTR
input) should be skipped by the Crossbar.
0: Corresponding P2.n pin is not skipped by the Crossbar.
1: Corresponding P2.n pin is skipped by the Crossbar.
140
Rev. 1.1