English
Language : 

SA24C1024 Datasheet, PDF (13/27 Pages) List of Unclassifed Manufacturers – 1024Kb EEPROM IIC
Device Type
The IIC bus is designed to support a
variety of devices, such as RAMs,
EPROMs, and so on, as well as
EEPROMS. In order to properly identify the
various devices on the IIC bus, a 4-bit
Device Type identifier string is used. For
EEPROMS, this 4-bit string is 1-0-1-0.
Every IIC device on the bus internally
compares this 4-bit string to its own Device
Type string to ensure proper device
selection.
Device/Page Block Selection
When multiple devices of the same type
(for example, multiple EEPROMS) are
present on the IIC bus, the A1 address
information bit is used in device selection.
Every IIC device on the bus internally
compares the first 2 bits of the
Device/Page Block selection string to its
own physical configuration (0, A1pin – for
the SA24C1024, the Device/Page Block
selection MSB is always 0) to ensure
proper device selection. This comparison is
carried out in addition to the Device Type
comparison.
In addition to selecting an EEPROM, the
second and third Device/Page Block
selection bits (A1, add16) can be viewed
as selection controls to a page block within
the selected EEPROM. Each page block is
512 Kbits (64 KBytes) in size.
Read/Write Bit
The last bit of the Slave address indicates
whether the intended access is Read or
Write. If the bit is 1, the access is Read; if it
is 0, the access is Write.
SA24C1024 Datasheet
SAIFUN
13
Acknowledge
Acknowledge is an active LOW pulse on
the SDA line that is driven by an addressed
receiver to the addressing transmitter to
indicate receipt of 8 bits of data. The
receiver provides an ACK pulse for every 8
bits of data received. This handshake
mechanism is done as follows:
1. After transmitting 8 bits of data, the
transmitter releases the SDA line
and waits for the ACK pulse.
2. The addressed receiver, if present,
then drives the ACK pulse on the
SDA line during the 9th clock and
releases the SDA line back to the
transmitter.
For more details, see Figure 12.
Array Address#1
This is an 8-bit information that contains
the most significant 8 bits (without the MSB
bit, which is the add16 bit located in the
Slave address byte) of the 17-bit memory
array address.
Array Address#0
This is an 8-bit information that contains
the least significant 8 bits of the 17-bit
memory array address.