JA32050 Datasheet, PDF (12/19 Pages) List of Unclassifed Manufacturers – 8-Bit MCU,ADC,LCD Controller

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JA32050
1/3 bias
Connected to Vdd Connected to Vdd
through a 104 cap
cap
Connected to Vss CAP1 connected to
through a 104 cap CAP2 through a 104
cap
In R bias application, V30, V15, CAP1, CAP2 are normal segment signals.
ADC Function Description
Ԧʳ ADC General
The JA32050 offers very high accuracy A/D conversion by using Dual Slope integration. It incorporates
operational amplifiers, comparators, power on/off control circuit and charge/discharge control circuit inside to
achieve high performance for application. A voltage follower was used as buffer for sensor signal input.
Because of the buffer’s great isolating characteristic, the signal from sensor will be precisely duplicated and
sent out at output pin without any distortion.
An operational amplifier was designed for user to properly amplify the sensor signal from buffer. Inside the
chip, a current accurately proportional to the amplified signal level will be generated to charge an external
RC network for a fixed time interval. After being charged for this interval, the capacitor is discharged by a
constant current until the voltage reaches 1/6 VDD. This discharging time is proportional to the input signal
level and is used by external controller to enable a counter; the final count is proportional to the input level
and can be converted to digital output. Because the charge cycle and discharge cycle go through the same
RC network, using a high quality capacitor is recommended.
Ԧʳ ADC Timing Diagram
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9''
9''
Preliminary
TELΚ886-3-5770755
FAXΚ886-3-5770756
19-12
E-mailΚ[e-mail]
Ver.0.0
Web-siteΚwww.jaztek.com.tw