M13S2561616A_09 Datasheet, PDF (5/49 Pages) Elite Semiconductor Memory Technology Inc. – 4M x 16 Bit x 4 Banks Double Data Rate SDRAM

ESMT
M13S2561616A
DC Specifications
Parameter
Operation Current
(One Bank Active)
Operation Current
(One Bank Active)
Precharge Power-down
Standby Current
Symbol
Test Condition
IDD0
IDD1
IDD2P
t_RC = t_RC (min), t_CK = t_CK (min)
Active – Precharge
Burst Length = 2, t_RC = t_RC (min), CL= 2.5,
I_OUT = 0mA, Active-Read- Precharge
CKE ≤ V_IL(max), t_CK = t_CK (min), All banks idle
Version
-4
-5
-6
140 130 120
190 185 165
40 30 25
Idle Standby Current
IDD2N _{CKE ≥ VIH(min), CS ≥ VIH(min), tCK = tCK (min)} 70
60
55
Active Power-down
Standby Current
IDD3P All banks ACT, CKE ≤ V_IL(max), t_CK = t_CK (min)
55 50 45
Active Standby Current
IDD3N
One bank; Active-Precharge, t_RC = t_RAS(max),
t_CK = t_CK (min)
120 95 90
Operation Current (Read)
IDD4R
Burst Length = 2, CL= 2.5 , t_CK = t_CK (min),
I_OUT = 0mA
300 290 250
Operation Current (Write) IDD4W Burst Length = 2, CL= 2.5 , t_CK = t_CK (min)
300 290 250
Auto Refresh Current
Self Refresh Current
IDD5
IDD6
t_RC ≥ t_RFC(min)
CKE ≤ 0.2V
300 270 250
6
5
5
Operation Current
(Four Bank Operation)
IDD7
Four bank interleaving with BL = 4, t_RC = t_RC(min),
burst mode; Read with auto precharge;
Address and control input on NOP edge are not
350
300
270
changing. I_OUT = 0mA
Note: 1. Enable on-chip refresh and address counters.
Unit Note
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA 1
mA
AC Operation Conditions & Timing Specification
AC Operation Conditions
Parameter
Symbol
Min
Max
Unit
Note
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals
V_IH(AC) V_REF + 0.31
V
V_IL(AC)
V_REF - 0.31
V
Input Different Voltage, CLK and CLK inputs
V_ID(AC)
0.7
V_DDQ+0.6
V
1
Input Crossing Point Voltage, CLK and CLK inputs
V_IX(AC) 0.5*V_DDQ-0.2 0.5*V_DDQ+0.2
V
2
Note: 1. V_ID is the magnitude of the difference between the input level on CLK and the input on CLK .
2. The value of V_IX is expected to equal 0.5*V_DDQ of the transmitting device and must track variations in the DC level of the
same.
Input / Output Capacitance
(V_DD = 2.3V~2.7V, V_DDQ =2.3V~2.7V, T_A = 25 °C , f = 1MHz)
(V_DD = 2.4V~2.8V, V_DDQ = 2.4V~2.8V, T_A = 25 °C , f = 1MHz (only for speed -4))
Parameter
Symbol
Input capacitance
C_IN1
(A0~A12, BA0~BA1, CKE, CS , RAS , CAS , WE )
Input capacitance (CLK, CLK )
Data & DQS input/output capacitance
Input capacitance (DM)
C_IN2
C_OUT
C_IN3
Min
Max
Unit
2.0
3.0
pF
2.0
3.0
pF
4.0
5.0
pF
4.0
5.0
pF
Elite Semiconductor Memory Technology Inc.
Publication Date : Sep. 2009
Revision : 2.0
5/49