M13S2561616A-2A Datasheet, PDF (48/49 Pages) Elite Semiconductor Memory Technology Inc. – Double-data-rate architecture, two data transfers per clock cycle

ESMT
Revision History
Revision
1.0
1.1
Date
2012.06.25
2012.09.19
M13S2561616A (2A)
Automotive Grade
Description
Original
Modify BGA packing dimension
Elite Semiconductor Memory Technology Inc.
Publication Date : Sep. 2012
Revision : 1.1
48/49