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| M12L128324A_09 Datasheet, PDF (45/46 Pages) Elite Semiconductor Memory Technology Inc. – 1M x 32 Bit x 4 Banks Synchronous DRAM | |||
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ESMT
Revision History
Revision
0.1
0.2
1.0
1.1
1.2
1.3
1.4
M12L128324A
Date
2005.05.13
2005.08.08
2005.12.22
2006.02.14
2006.03.13
2007.03.02
2009.08.14
Description
Original
Delete Non-Pb-free of ordering information
1. Delete âPreliminaryâ from datasheet
2. Add 90BGA Packing Dimension
Modify ICC4, ICC5 spec
Modify ICC2N, ICC3N spec
Delete BGA ball name of packing dimensions
1.Move Revision History to the last
2.Modify the test condition of IIL and ICC3N
3.Correct the timing for Auto Refresh
4.Delete power up sequence and frequency vs. AC
parameter relationship table
5.Correct the description of bank address, address inputs
and MRS of device operations
6.Modify the description about self refresh operation
Elite Semiconductor Memory Technology Inc.
Publication Date: Aug. 2009
Revision: 1.4
45/46
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