M12L64164A_09 Datasheet, PDF (44/45 Pages) Elite Semiconductor Memory Technology Inc. – 1M x 16 Bit x 4 Banks Synchronous DRAM

ESMT
Revision History
Revision
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
M12L64164A
Date
2001.12.13
2002.01.10
2002.01.30
2002.04.26
2002.10.21
2002.12.24
2003.02.13
2003.03.03
2003.07.30
2003.10.22
2003.12.17
2004.07.21
2005.01.21
2005.03.17
2005.07.12
2005.09.30
2005.11.11
2006.06.19
2006.07.06
2006.12.08
2007.03.16
2007.07.31
2007.10.09
2008.05.05
2009.05.06
Description
Original
Add -6 spec
Delete Page44 PACKING DIMENSION 54-LEAD TSOP(II)
SDRAM (400mil) (1:4).
tRFC : 60ns. (Page5)
Add -5, Delete -8. (P1,4~7)
Delete -5 spec (AC/DC). (page 1,4~7)
Change Icc5 / Icc3p /Icc3ps : Icc5=130mA-->Icc5=180mA /
Icc3p=5mA-->Icc3p=10mA / Icc3ps=5mA-->Icc3ps=10mA
(page 4)
tRAS = 45ns --> tRAS = 42ns. (page 5,7)
DQM with clock suspended(Full Page Read) needs
modified to describe “Full Page”. (page 17)
Modify refresh period. (page 1,13,23,40,41)
1. Delete “The write burst length is programmed using A9
2. Test mode use A7~A8
3.Vendor specific options use A9, A10~A11 and A12~BA0
1. Correct typing errorÆ Page18(tCCDÆtCDL),
Page22(Note4, Note6), Page23(Note8ÆNote6),
Page29(Note3, Note4)
2. Correct plot1.2 clock suspended during read(Page17)
3. Correct plot1.2 read interrupted by precharge(Page22)
Delete -5 spec (AC/DC). (page 1,4~7)
Add pb-free product number(Page1,7)
1. Add Pb-free to ordering information
2. Modify P8 for bank precharge state to idle state
1. Rename Pb to Non-Pb-free on ordering info.
2. Modify ICC1; ICC2N; ICC3N; 1CC4; ICC5 spec
Add –5T speed grade spec
1. Modify tCC and tSAC spec
2. 5T : tCC = 7ns Î tCC = 10ns
tSAC = 5ns Î tSAC = 6ns
3. 6T : tCC = 8ns Î tCC = 10ns
Add BRSW mode
Modify some description for BRSW.
Add BGA type to ordering information
Delete the mark of BGA package in packing diemension
Modify Icc2N test condition (/CS <= VIH Î /CS >= VIH )
Modify tSHZ timing
1. Add Revision History
2. Rename A13, A12 to BA0, BA1
3. Delete frequency vs. AC parameter relationship table
1.Move Revision History to the last
2.Modify the test condition of I_IL
3.Modify the description about self refresh operation
4.Modify typo error
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2009
Revision: 3.4
44/45