M12L2561616A-2S Datasheet, PDF(20/44 Page) Elite Semiconductor Memory Technology Inc.

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M12L2561616A-2S Datasheet, PDF (20/44 Pages) Elite Semiconductor Memory Technology Inc. – JEDEC standard 3.3V power supply

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ESMT

6. Precharge

1)Normal Write (BL=4)

CLK

CMD

D0 D1 D2 D3

tRDL

*Note1

M12L2561616A (2S)

2)Normal Read (BL=4)

CLK

PRE

CMD

DQ(CL2)

PRE CL=2

*Note2

Q0 Q1 Q2 Q3

CMD

DQ(CL3)

PRE CL=3

*Note2

Q0 Q1 Q2 Q3

7. Auto Precharge

1 )N or m al W ri t e (B L = 4)

2 )N o rm al R e ad (B L = 4)

C LK

CLK

C MD

CMD

D 0 D1 D2 D3

tR D L ( mi n )

D Q(CL2)

DQ(CL3)

* N o t e3

Au t o P r ec h a rg e s ta r t s

D0 D1 D2 D3

D 0 D 1 D2 D3

* N o t e3

A ut o P r e ch a rg e sta r t s

*Note:

1. tRDL: Last data in to row precharge delay.

2. Number of valid output data after row precharge: 1, 2 for CAS Latency = 2, 3 respectively.

3. The row active command of the precharge bank can be issued after tRP from this point.

The new read/write command of other activated bank can be issued from this point.

At burst read/write with auto precharge, CAS interrupt of the same/another bank is illegal.

Elite Semiconductor Memory Technology Inc.

Publication Date: Jul. 2014

Revision: 1.2

20/44

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