M12L16161A_08 Datasheet, PDF (17/29 Pages) Elite Semiconductor Memory Technology Inc. – 512K x 16Bit x 2Banks Synchronous DRAM

ESMT
Read & Write Cycle at Different Bank @ Burst Length = 4
M12L16161A
*Note: 1.tCDL should be met to complete write.
Elite Semiconductor Memory Technology Inc.
Publication Date : Sep. 2008
Revision : 2.7
17/29