M12L16161A_08 Datasheet, PDF (1/29 Pages) Elite Semiconductor Memory Technology Inc. – 512K x 16Bit x 2Banks Synchronous DRAM

ESMT
SDRAM
M12L16161A
512K x 16Bit x 2Banks
Synchronous DRAM
FEATURES
z JEDEC standard 3.3V power supply
z LVTTL compatible with multiplexed address
z Dual banks operation
z MRS cycle with address key programs
- CAS Latency (2 & 3 )
- Burst Length (1, 2, 4, 8 & full page)
- Burst Type (Sequential & Interleave)
z All inputs are sampled at the positive going edge of the
system clock
z Burst Read Single-bit Write operation
z DQM for masking
z Auto & self refresh
z 32ms refresh period (2K cycle)
GENERAL DESCRIPTION
The M12L16161A is 16,777,216 bits synchronous high
data rate Dynamic RAM organized as 2 x 524,288 words by
16 bits, fabricated with high performance CMOS technology.
Synchronous design allows precise cycle control with the
use of system clock I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst length and programmable latencies allow the same
device to be useful for a variety of high bandwidth, high
performance memory system applications.
ORDERING INFORMATION
Part NO.
M12L16161A-5TG
M12L16161A-7TG
M12L16161A-7BG
MAX Freq.
200MHz
143MHz
143MHz
PACKAGE COMMENTS
TSOP(II) Pb-free
TSOP(II) Pb-free
VFBGA
Pb-free
PIN CONFIGURATION (TOP VIEW)
1
2
3
4
5
6
7
VDD
1
DQ0
2
DQ1
3
VSSQ
4
DQ2
5
DQ3
6
VDDQ
7
DQ4
8
DQ5
9
VSSQ
10
DQ6
11
DQ7
12
VDDQ
13
LDQM 14
WE
15
CAS
16
RAS
17
CS
18
BA
19
A10/AP 20
A0
21
A1
22
A2
23
A3
24
VDD
25
A
50 VSS
49 DQ15
B
48 DQ14
47 VSSQ
C
46 DQ13
45 DQ12
D
44 VDDQ
E
43 DQ11
42 DQ10
F
41 VSSQ
40 DQ9
G
39 DQ8
38 VDDQ
H
37 N.C/RFU
J
36 UDQM
35 CLK
K
34 CKE
33 N.C
L
32 A9
31 A8
M
30 A7
N
29 A6
28 A5
27 A4
26 VSS
P
50PIN TSOP(II)
(400mil x 825mil)
R
(0.8 mm PIN PITCH)
VSS DQ15
DQ14 VSSQ
DQ13 VDDQ
DQ12 DQ11
DQ10 VSSQ
DQ9 VDDQ
DQ8 NC
NC
NC
NC UDQM
NC
CLK
CKE
NC
BA
A9
A8
A7
A6
A5
VSS A4
DQ0 VDD
VDDQ DQ1
VSSQ DQ2
DQ4 DQ3
VDDQ DQ5
VSSQ DQ6
NC
DQ7
NC
NC
LDQM WE
RAS CAS
NC
CS
NC
NC
A0
A10
A2
A1
A3
VDD
60 Ball VFBGA
(6.4x10.1mm)
(0.65mm ball pitch)
Elite Semiconductor Memory Technology Inc.
Publication Date : Sep. 2008
Revision : 2.7
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