S1D13503F00A200 Datasheet, PDF (226/271 Pages) Epson Company – S1D13503 Graphics LCD Controller

Page 16
Epson Research and Development
Vancouver Design Center
3.9 Crystal Support
The input crystal frequency may be up to 25.0 Mhz depending on the specific panel size and frame rate desired.
Refer to Section 9.3 of the S1D13503 Functional Specification, Drawing Office No. X18A-A-001-xx for further details.
3.10 Oscillator Support
The input oscillator frequency used may be up to 25.0 MHz, depending on the specific panel size and frame rate desired.
Refer to Section 9.3 of the S1D13503 Functional Specification, Drawing Office No. X18A-A-001-xx for further details.
Note
When the oscillator package is used capacitors C7, C8 and resistor R16 must be removed.
3.11 CPU/Bus Interface Header Strips
All of the CPU/Bus interface pins of S1D13503, with the exception of SA16, are connected to the header strips H1 and H2
for easy interface to a CPU/Bus other than the ISA bus.
Refer to Table 2-5, CPU/BUS Connector H1 Pinout, on page 11 and Table 2-6, CPU/BUS Connector H2 Pinout, on page
12 for specific settings.
Note
These headers only provide the CPU/Bus interface signals from S1D13503, when MC68000 interface is selected (SW1-
3 closed), external decoding logic MUST be used to access the S1D13503.
3.12 Schematic Notes
This evaluation board may have been modified and therefore the following schematics may not reflect the actual imple-
mentation. Please request updated information before starting any hardware design.
S1D13503
X18A-G-007-05
S5U13503B00C Rev. 1.0 Evaluation Board User Manual
Issue Date: 01/01/30