EN25S16 Datasheet, PDF (42/58 Pages) Eon Silicon Solution Inc. – 16 Megabit 1.8V Serial Flash Memory with 4Kbyte Uniform Sector

EN25S16
Device ID of the device to be output on Serial Data Output (DO).
The Deep Power-down mode automatically stops at Power-down, and the device always Powers-up in
the Standby mode. The Deep Power-down (DP) instruction is entered by driving Chip Select (CS#) Low,
followed by the instruction code on Serial Data Input (DI). Chip Select (CS#) must be driven Low for the
entire duration of the sequence.
The instruction sequence is shown in Figure 29.Chip Select (CS#) must be driven High after the eighth
bit of the instruction code has been latched in, otherwise the Deep Power-down (DP) instruction is not
executed. As soon as Chip Select (CS#) is driven High, it requires a delay of tDP before the supply
current is reduced to I_CC2 and the Deep Power-down mode is entered.
Any Deep Power-down (DP) instruction, while an Erase, Program or Write cycle is in progress, is
rejected without having any effects on the cycle that is in progress.
Figure 29. Deep Power-down Instruction Sequence Diagram
Release from Deep Power-down and Read Device ID (RDI)
Once the device has entered the Deep Power-down mode, all instructions are ignored except the
Release from Deep Power-down and Read Device ID (RDI) instruction. Executing this instruction takes
the device out of the Deep Power-down mode.
Please note that this is not the same as, or even a subset of, the JEDEC 16-bit Electronic Signature
that is read by the Read Identifier (RDID) instruction. The old-style Electronic Signature is supported for
reasons of backward compatibility, only, and should not be used for new designs. New designs should,
instead, make use of the JEDEC 16-bit Electronic Signature, and the Read Identifier (RDID) instruction.
When used only to release the device from the power-down state, the instruction is issued by driving
the CS# pin low, shifting the instruction code “ABh” and driving CS# high as shown in Figure 30. After
the time duration of tRES1 (See AC Characteristics) the device will resume normal operation and other
instructions will be accepted. The CS# pin must remain high during the tRES1 time duration.
When used only to obtain the Device ID while not in the power-down state, the instruction is initiated by
driving the CS# pin low and shifting the instruction code “ABh” followed by 3-dummy bytes. The Device
ID bits are then shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in
Figure 31. The Device ID value for the EN25S16 are listed in Table 6. The Device ID can be read
continuously. The instruction is completed by driving CS# high.
When Chip Select (CS#) is driven High, the device is put in the Stand-by Power mode. If the device
was not previously in the Deep Power-down mode, the transition to the Stand-by Power mode is
immediate. If the device was previously in the Deep Power-down mode, though, the transition to the
Standby Power mode is delayed by tRES2, and Chip Select (CS#) must remain High for at least tRES2
(max), as specified in Table 15. Once in the Stand-by Power mode, the device waits to be selected, so
that it can receive, decode and execute instructions.
This Data Sheet may be revised by subsequent versions
42
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. H, Issue Date: 2011/12/16
www.eonssi.com