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EN29LV160 Datasheet, PDF (30/45 Pages) Eon Silicon Solution Inc. – 16 Megabit (2048K x 8-bit / 1024K x 16-bit) Flash Memory Boot Sector Flash Memory, CMOS 3.0 Volt-only
Table 12. AC CHARACTERISTICS
EN29LV160
Read-only Operations Characteristics
Parameter
Symbols
JEDEC Standard
tAVAV
tRC
Description
Read Cycle Time
Test
Setup
Min
Speed Options
-70
-90
70
90
tAVQV
tACC
Address to Output Delay
CE = VIL Max
70
90
OE = VIL
tELQV
tCE
Chip Enable To Output Delay
OE = VIL Max
70
90
tGLQV tOE
Output Enable to Output Delay
Max
30
35
tEHQZ tDF
Chip Enable to Output High Z
Max
20
20
tGHQZ tDF
Output Enable to Output High Z
Max
20
20
tAXQX tOH
Output Hold Time from
Addresses, CE or OE ,
Min
0
0
whichever occurs first
Notes:
For - 70
Vcc = 3.0V ± 5%
Output Load : 1 TTL gate and 30pF
Input Rise and Fall Times: 5ns
Input Rise Levels: 0.0 V to 3.0 V
Timing Measurement Reference Level, Input and Output: 1.5 V
For all others:
Vcc = 2.7V – 3.6V
Output Load: 1 TTL gate and 100 pF
Input Rise and Fall Times: 5 ns
Input Pulse Levels: 0.45 V to .8 x Vcc
Timing Measurement Reference Level, Input and Output: 0.8 V and .7 x Vcc
Unit
ns
ns
ns
ns
ns
ns
ns
Addresses
CE#
OE#
WE#
Outputs
Reset#
RY/BY#
0V
tOEH
tRC
Addresses Stable
tACC
tDF
tOE
tCE
tOH
Output Valid
HIGH Z
Figure 5. AC Waveforms for READ Operations
This Data Sheet may be revised by subsequent versions 30 ©2003 Eon Silicon Solution, Inc., www.essi.com.tw
or modifications due to changes in technical specifications.
Rev. A, Issue Date: 2004/03/30