EP5352Q Datasheet, PDF (4/16 Pages) Enpirion, Inc. – 500/600/800mA Synchronous Buck Regulators With Integrated Inductor

Pin Description
EP5382Q/EP5362Q/EP5352Q
V_IN
1
V_IN
2
GND ³
GND ⁴
V_OUT ⁵
V_OUT 6
16 VFB
15 V_SENSE
14 NC
13 NC
12 NC
11 NC
V_{FB 16}
V_{SENSE 15}
NC ¹⁴
NC 13
NC ¹²
NC 11
Thermal
Pad
1 V_IN
2 V_IN
3 _GND
4 _GND
5 V_OUT
6 V_OUT
Figure 2. Pin description, top view.
V_IN (Pin 1,2): Input voltage pin. Supplies power
to the IC. V_IN can range from 2.4V to 5.5V.
Input GND: (Pin 3): Input power ground.
Connect this pin to the ground terminal of the
input capacitor.
Refer to
Layout
Recommendations for further details.
Output GND: (Pin 4): Power ground. The
output filter capacitor should be connected to
this pin. Refer to Layout recommendations for
further detail.
V_OUT (Pin 5,6,7): Regulated output voltage.
NC (Pin 8,9,10,11,12,13,14): These pins
should not be electrically connected to each
other or to any external signal, voltage, or
ground. One or more of these pins may be
connected internally.
V_SENSE (Pin 15): Sense pin for output voltage
regulation. Connect V_SENSE to the output
voltage rail as close to the terminal of the
output filter capacitor as possible.
Figure 3. Pin description, bottom view.
V_FB (Pin 16): Feed back pin for external divider
option. When using the external divider option
(VS0=VS1=VS2= high) connect this pin to the
center of the external divider. Set the divider
such that V_FB = 0.603V.
VS0,VS1,VS2 (Pin 17,18,19): Output voltage
select. VS0=pin19, VS1=pin18, VS2=pin17.
Selects one of seven preset output voltages or
choose external divider by connecting pins to
logic high or low. Logic low is defined as V_LOW
≤ 0.4V. Logic high is defined as V_HIGH ≥ 1.4V.
Any level between these two values is
indeterminate. (refer to section on output
voltage select for more detail).
ENABLE (Pin 20): Output enable. Enable =
logic high, disable = logic low. Logic low is
defined as V_LOW ≤ 0.2V. Logic high is defined
as V_HIGH ≥ 1.4V. Any level between these two
values is indeterminate.
Thermal Pad. Thermal pad to remove heat
from package. Connect to surface ground pad
and PCB internal ground plane.
©Enpirion 2009 all rights reserved, E&OE
03132
4
4/28/2009
www.enpirion.com
Rev:B