EN2390QI Datasheet, PDF (3/21 Pages) Enpirion, Inc. – 9A Voltage Mode Synchronous Buck PWM

Pin Description
I/O Legend: P=Power
PIN
1-19,
29, 30,
61, 67,
72-76
NAME
NC
20-28
VOUT
31, 32,
69-71
NC(SW)
33-38
39-49
PGND
PVIN
50
AVINO
51
PG
52
BTMP
53
VDDB
54
BGND
55
S_IN
56
S_OUT
57
POK
58
ENABLE
59
AVIN
60
AGND
61
NC
62
VFB
63
EAIN
64
SS
65
RCLX
66
FADJ
EN2390QI
G=Ground NC=No Connect
I=Input O=Output
I/O=Input/Output
I/O
FUNCTION
NO CONNECT – These pins may be internally connected. Do not connect them
NC
to each other or to any other electrical signal. Failure to follow this guideline
may result in device damage.
O
Regulated converter output. Connect these pins to the load and place output
capacitor between these pins and PGND pins 33-38.
NO CONNECT – These pins are internally connected to the common switching
NC
node of the internal MOSFETs. They are not to be electrically connected to any
external signal, ground, or voltage. Failure to follow this guideline may result in
damage to the device.
Input/Output power ground. Connect these pins to the ground electrode of the
G input and output filter capacitors. See VOUT and PVIN pin descriptions for more
details.
P
Input power supply. Connect to input power supply. Decouple with input
capacitor to PGND pins 33-38.
Internal 3.3V linear regulator output. Connect this pin to AVIN (Pin 59) for
O
applications where operation from a single input voltage (PVIN) is required. If
AVINO is being used, place a 1uF, X5R, capacitor between AVINO and AGND
as close as possible to AVINO.
I/O Place a 0.1uF, X5R, capacitor between this pin and BTMP.
I/O See pin 51 description.
O
Internal regulated voltage used for the internal control circuitry. Place a 1uF,
X5R, capacitor between this pin and BGND.
G See pin 53 description.
Digital Input. This pin accepts either an input clock to phase lock the internal
I switching frequency or a S_OUT signal from another EN2390QI. Leave this pin
floating if not used.
O
Digital Output. PWM signal is output on this pin. Leave this pin floating if not
used.
Power OK is an open drain transistor (pulled up to AVIN or similar voltage) used
O for power system state indication. POK is logic high when VOUT is within -10%
to +20% of VOUT nominal.
I
Input Enable. Applying a logic high to this pin enables the output and initiates a
soft-start. Applying a logic Low disables the output.
P
3.3V Input power supply for the controller. Place a 0.1uF, X5R, capacitor
between AVIN and AGND
G
Analog Ground. This is the Ground return for the controller. Needs to be
connected to a quiet ground.
Test pin. For Enpirion Internal Use Only. Connect to GND plane at all times.
External Feedback Input. The feedback loop is closed through this pin. A
I/O
voltage divider at VOUT is used to set the output voltage. The mid-point of the
divider is connected to VFB. A phase lead capacitor from this pin to VOUT is
also required to stabilize the loop.
O
Optional Error Amplifier Input. Allows for customization of the control loop if
necessary.
I/O
Soft-Start node. The soft-start capacitor is connected between this pin and
AGND. The value of this capacitor determines the startup time.
Programmable over-current protection. Placement of a resistor on this pin will
I/O
adjust the over-current protection threshold. See Table 2 for the recommended
RCLX Value to set OCP at the nominal value specified in the Electrical
Characteristics table.
Adding a resistor (R_FADJ) to this pin will adjust the switching frequency of the
I/O EN2390QI. See Table 1 for suggested resistor values on R_FADJ for various
PVIN/VOUT combinations to maximize efficiency.
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