EN2390QI Datasheet, PDF (12/21 Pages) Enpirion, Inc. – 9A Voltage Mode Synchronous Buck PWM

Spread Spectrum Mode
The external clock frequency may be swept
between 0.8MHz and 1.6MHz at repetition
rates of up to 10 kHz in order to reduce EMI
frequency components.
Soft-Start Operation
Soft start is a means to ramp the output voltage
gradually upon start-up. The output voltage rise
time is controlled by the choice of soft-start
capacitor, which is placed between the SS pin (pin
78) and the AGND pin (pin 74).
Rise Time (ms): T_R ≈ C_ss [nF] x 0.067
During start-up of the converter, the reference
voltage to the error amplifier is linearly increased to
its final level by an internal current source of
approximately 10µA. Typical soft-start rise time is
~3.2ms with SS capacitor value of 47nF. The rise
time is measured from when V_IN > V_UVLOR and
ENABLE pin voltage crosses its logic high
threshold to when V_OUT reaches its programmed
value.
POK Operation
The POK signal is an open drain signal (requires a
pull up resistor to AVIN or similar voltage) from the
converter indicating the output voltage is within the
specified range. Typically, a 100kΩ or lower
resistance is used as the pull-up resistor. The POK
signal will be logic high (AVIN) when the output
voltage is above 90% of the programmed V_OUT. If
the output voltage goes outside of this range, the
POK signal will be a logic low.
Over-Current Protection (OCP)
The current limit function is achieved by sensing
the current flowing through a sense PFET. When
the sensed current exceeds the current limit, both
power FETs are turned off for the rest of the
switching cycle. If the over-current condition is
removed, the over-current protection circuit will re-
enable PWM operation. If the over-current condition
persists, the circuit will continue to protect the load.
The OCP trip point is nominally set as specified in
the Electrical Characteristics table. In the event the
EN2390QI
OCP circuit trips consistently in normal operation,
the device enters a hiccup mode. While in hiccup
mode, the device is disabled for a short while and
restarted with a normal soft-start. The hiccup time
is approximately 32ms. This cycle can continue
indefinitely as long as the over current condition
persists.
The OCP trip point can be programmed to trip at a
lower level via the RCLX pin. The value of the
resistor connected between RCLX and ground will
determine the OCP trip point. Generally, the higher
the RCLX value, the higher the current limit
threshold. Note that if RCLX pin is left open the
output current will be unlimited and the device will
not have current limit protection. Reference Table 2
for a list of recommended resistor values on RCLX
that will set the OCP trip point at the typical value of
13.5A, also specified in the Electrical
Characteristics table. This table assumes V_OUT < V_IN
– 2.5V. Contact [e-mail] for
specific RCLX values to be use for special cases.
V_OUT Range
0.6V < V_OUT ≤ 0.9V
0.9V < V_OUT ≤ 1.2V
1.2V < V_OUT ≤ 2.0V
2.0V < V_OUT ≤ 5.0V
R_CLX Value
36.5k
38.4k
40.2k
45.3k
Table 2: Recommended R_CLX Values vs. V_OUT
Thermal Overload Protection
Thermal shutdown circuit will disable device
operation when the junction temperature exceeds
approximately 150ºC. After a thermal shutdown
event, when the junction temperature drops by
approx 20ºC, the converter will re-start with a
normal soft-start.
Input Under-Voltage Lock-Out (UVLO)
Internal circuits ensure that the converter will not
start switching until the input voltage is above the
specified minimum voltage. Hysteresis, input de-
glitch and output leading edge blanking ensures
high noise immunity and prevents false UVLO
triggers.
©Enpirion 2012 all rights reserved, E&OE
Enpirion Confidential
www.enpirion.com, Page 12