EPVP6810 Datasheet, PDF (47/50 Pages) ELAN Microelectronics Corp – VFD Controller

ePVP6810
VFD Controller
13 Key & Switch Scanning and Display Timing
The key & switch scanning and display timing diagram is given below. One cycle of key &
switch scanning consists of 2 frames. The data of the 4 x 4 matrix is stored in the RAM.
Fig. 16 Key & Switch Scanning and Display Timing Diagram
This specification is subject to change without further notice.
11.28.2004 (V1.23)41 of 50