EPVP6810 Datasheet, PDF (36/50 Pages) ELAN Microelectronics Corp – VFD Controller

ePVP6810
VFD Controller
The other registers’ (Bit 7 ~ Bit 0) default values are as follows.
Address ^{R Register}
PAGE 0
0x4
00xxxxxx
0x5 0000xxxx
0x6 00000000
0x7 00000000
0x8 00000000
0x9 00000000
0xA 00011xx0
0xB 00000000
0xC 1011xxxx
0xD xxxxx000
0xE X0000000
0xF 00000000
R Register
PAGE 1
xxxx0000
00000000
00000000
xxxxxxxx
xxxxxxxx
00000000
00000000
R Register
PAGE 2
00000000
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
xxxxxxxx
R Register IOC Register IOC Register
PAGE 3
PAGE 0
PAGE 1
11111111
x1111111
1111xxxx
xxxxx000
x000xxxx
00000000
00000000
00000000
00000000
x0000000
1111xxxx
7.7 Wake Up
The controller features two types of sleep mode for power saving:
7.7.1 SLEEP Mode, RA(6 ;7) = 0 + "SLEP" Instruction
Under this mode, the controller turns off all the CPU and crystal. However, other circuits with
power control like key tone control or PLL control (with register enabled), has to be turned off
through software.
7.7.2 IDLE mode, RA(6 ;7) = 1 + "SLEP" Instruction.
With this mode, the controller only turns the CPU off. The crystal remains running.
7.7.3 Wake-up from SLEEP Mode
1. WDT time out
2. External interrupt
3. /RESET pull low
Any of these cases will reset the controller and run the program from address zero. The
status is just like the power-on-reset condition. Be sure to enable circuit after cases 1 or 2
occurs.
30 of 50 11.28.2004 (V123)
This specification is subject to change without further notice.