EPVP6810 Datasheet, PDF (12/50 Pages) ELAN Microelectronics Corp – VFD Controller

ePVP6810
VFD Controller
6 Pin Descriptions
Pin No.
Pin Name
I/O #
Description
Note
10
VDD
- 1 Logic power supply
40 – 42
GPIOC0 – GPIOC3
General Purpose I/O pins:
1. Key data input to these pins is latched at the end of display
cycle.
Schmitt
I/O 4 _{2. These pins constitute 4-bit general-purpose input/output port. Pull-up}
3. Programmable Internal Pull-High
4. Wake-up Function
11-14
(B Cell)
GR1 – GR4
O 4 1. High voltage grid output
15-19
(B Cell)
GR5 – GR9
1. High voltage grid output
O5
2. High voltage segment output
20-22
(B Cell)
GR10/SG19 –
GR12/SG7
1. High voltage grid output
O3
2. High voltage segment output
23-24
A Cell
SG6/KS6
–
SG5/KS5
1. High voltage grid output
O 2 2. High voltage segment output
3. Matrix key scan output
1. High voltage segment output
25 ~28
SG4/KS4 – SG1/KS1 I/O 4 2. Matrix key scan output
∼
C Cell
3. General Purpose Input pins: p54~p57
31 38
GPIO90/LED0 –
GPIO97/LED7
1. General Purpose I/O pins
2. LED output pin (20mA)
I/O 8 3. IR Detector
4. Interrupt Function
5. Programmable Internal Pull-High
Schmitt
Pull-up
Phase Lock Loop Capacitor (connect a Capacitor 0.01 to 0.047u
43
PLLC
I 1 _{to the Ground).}
44
OSCI
I 1 Crystal Oscillator input pin (32, 768Hz)
1
OSCO
O 1 Crystal Oscillator output pin (32, 768Hz)
2
VSS
- 1 Connect this pin to GND of the system
30
/RESET
I 1 Low active RESET signal input
Schmitt
29
VEE
- 1 Pull-down level (VDD-(-40V)max)
6 of 50 11.28.2004 (V123)
This specification is subject to change without further notice.