English
Language : 

EPVP6800 Datasheet, PDF (46/47 Pages) ELAN Microelectronics Corp – VFD Controller
ePVP6800
VFD Controller
13 Key & Switch Scanning and Display Timing
The key & switch scanning and display timing diagram is given below. One cycle of key & switch
scanning consists of 2 frames. The data of the 4 x 4 matrix is stored in the RAM.
Fig. 15 Key & Switch Scanning and Display Timing Diagram
40 of 47 11. 28.2004 (V1.23)
This specification is subject to change without further notice.