EPVP6800 Datasheet, PDF (17/47 Pages) ELAN Microelectronics Corp – VFD Controller

ePVP6800
VFD Controller
7.2.7 R6 (PORT6 Output Data, SPI Data Buffer)
a) PAGE 0 (PORT6 Output Data Register for HV)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
P67
P66
P65
P64
P63
P62
W-0
W-0
W-0
W-0
W-0
W-0
Bit 1
P61
W-0
Bit 0
P60
W-0
7.2.8 R7 (PORT7 Output Data, Counter1 Data
a) PAGE 0 (PORT7 Output Data Register for HV)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
P77
P76
P75
P74
P73
P72
W-0
W-0
W-0
W-0
W-0
W-0
Bit 1
P71
W-0
Bit 0
P70
W-0
c) PAGE 2 (Counter 1 Data Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
CN17
CN16
CN15
CN14
CN13
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
Bit 2
CN12
R/W-0
Bit 1
CN11
R/W-0
Bit 0
CN10
R/W-0
Bit 0 ~ Bit 7 (CN10 ~ CN17) : Counter1 buffer that you can read and write.
Counter1 is an 8-bit up-counter with 8-bit prescaler that allows you to
use R7 PAGE2 to preset and read the counter (write preset). After
an interruption, it will reload the preset value.
7.2.9 R8 (PORT8 Output data, Data RAM address) , Counter2_LB data
a) PAGE 0 (PORT8 Output Data Register for HV)
Bit 7
P87
Bit 6
P86
Bit 5
P85
Bit 4
P84
Bit 3
P83
Bit 2
P82
W-0
W-0
W-0
W-0
W-0
W-0
Bit 1
P81
W-0
Bit 0
P80
W-0
b) PAGE 1 (Data RAM Address Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RAM_A7 RAM_A6 RAM_A5 RAM_A4 RAM_A3 RAM_A2 RAM_A1 RAM_A0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
Bit 0 ~ Bit 7 (RAM_A0 ~ RAM_A7) : data RAM address
c) PAGE 2 (Counter2 Low Byte Data Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
CN27
CN26
CN25
CN24
CN23
CN22
R/W
R/W
R/W
R/W
R/W
R/W
Bit 1
CN21
R/W
Bit 0
CN20
R/W
Bit 0 ~ Bit 7 (CN20 ~ CN27) : Counter2_LB's buffer that you can read and write.
Counter2 is a 16-bit up-counter with 8-bit prescaler that allows you to
use R8 PAGE2 to preset and read the counter.(write preset). After
an interruption, it will reload the preset value.
This specification is subject to change without further notice.
11.28.2004 (V123) 11 of 47