EDJ1104BASE Datasheet, PDF (28/148 Pages) Elpida Memory – 1G bits DDR3 SDRAM

EDJ1104BASE, EDJ1108BASE, EDJ1116BASE
6. Measurement Definition for VM and ∆VM:
Measure voltage (VM) at test pin (midpoint) with no load:
∆VM
=

2 × VM
VDDQ
-
1 _{}
×
100
ODT Temperature and Voltage Sensitivity
If temperature and/or voltage change after calibration, the tolerance limits widen according to the table ODT
Sensitivity Definition and ODT Voltage and Temperature Sensitivity.
∆T = T − T (@calibration); ∆V= VDDQ − VDDQ (@calibration); VDD = VDDQ
Note: dRTTdT and dRTTdV are not subject to production test but are verified by design and characterization.
[ODT Sensitivity Definition]
min.
RTT
0.9 − dRTTdT × |∆T| - dRTTdV × |∆V|
max.
1.6 + dRTTdT×|∆T| + dRTTdV × |∆V|
Unit
RZQ/2, 4, 6, 8, 12
[ODT Voltage and Temperature Sensitivity]
min.
dRTTdT
0
dRTTdV
0
max.
1.5
0.15
Unit
%/°C
%/mV
ODT Timing Definitions
Test Load for ODT Timings
Different than for timing measurements, the reference load for ODT timings are defined in ODT Timing Reference
Load.
VDDQ
CK, /CK
DUT
DQ
DQS,
/DQS
VTT = VSSQ/2
RT =25Ω
ODT Timing Reference Load
Data Sheet E1128E60 (Ver. 6.0)
28