EDJ1104BASE Datasheet, PDF (108/148 Pages) Elpida Memory – 1G bits DDR3 SDRAM

EDJ1104BASE, EDJ1108BASE, EDJ1116BASE
CK
/CK
Command*³
Address*⁴
DQS, /DQS*²
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13
READ
Bank
Col n
NOP
tRTP = 4 nCK
PRE
tRPRE
NOP
tRP
tRPST
DQ
AL = 4
RL = AL + CL
CL = 5
Dout Dout Dout Dout Dout Dout Dout Dout
n n+1 n+2 n+3 n+4 n+5 n+6 n+7
Internal Read command starls here
VIH or VIL
Notes: 1. BL8, RL = 9, AL = (CL - 1), CL = 5
2. Dout n = data-out from column n.
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BL8 setting activated by either MR0 bit [A1, A0] = [0, 0] or MR0 bit [A1, A0] = [0, 1] and A12 = 1 during READ command at T0.
Burst Read Precharge Operation, RL = 9
Data Sheet E1128E60 (Ver. 6.0)
108